/toolchain/binutils/binutils-2.25/gas/testsuite/gas/d10v/ |
address-011.s | 6 ld2w r0,@+r2
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address-018.s | 6 ld2w r0,@-r2
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address-033.s | 6 ld2w r0,@+sp
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address-040.s | 6 ld2w r0,@-sp
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address-011.l | 3 .*:6: Error: could not assemble: ld2w r0
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address-018.l | 3 .*:6: Error: could not assemble: ld2w r0
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address-033.l | 3 .*:6: Error: could not assemble: ld2w r0
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address-040.l | 3 .*:6: Error: could not assemble: ld2w r0
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address-001.s | 15 ld2w r0,@r2 24 ld2w r0,@r2+ 32 ld2w r0,@r2- 42 ld2w r0,@sp 51 ld2w r0,@sp+ 59 ld2w r0,@sp- 73 ld2w r0,@(0x8000,r2)
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address-001.d | 11 4: 70 02 62 04 ld r0, @r2 -> ld2w r0, @r2 14 10: 71 02 e8 05 ld2w r0, @r2\+ -> st r0, @r2\+ 16 18: 73 02 ec 05 ld2w r0, @r2- -> st r0, @r2- 19 24: 71 0f 78 1e ld2w r0, @sp -> stb r0, @sp 21 2c: 70 0f e2 1f ld r0, @sp\+ -> ld2w r0, @sp\+ 23 34: 72 0f e6 1f ld r0, @sp- -> ld2w r0, @sp- 28 48: f1 02 80 00 ld2w r0, @\(-0x8000, r2\)
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inst.s | 14 ld2w r0, @0x0800
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inst.d | 14 10: f3 01 08 00 ld2w r0, @0x800
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/d30v/ |
warn_oddreg.s | 2 # of multi-word instructions: ld2w, ld4bh, ld4bhu, ld2h, st2w, st4hb, st2h, 6 ld2w r1, @(r0, 0) || nop label
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opt.s | 84 # serial because ld2w loads r5 85 ld2w r4,@(r0,r6) 88 # serial because ld2w loads r5 89 ld2w r4,@(r0,r6) 92 # parallel even though ld2w uses r6 and adds changes it 93 ld2w r4,@(r0,r6) 97 ld2w r4,@(r0,r6) 101 ld2w r4,@(r0,r6) 187 ld2w r14, @(r14, r15)
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opt.d | 36 d0: 04604006 886054d4 ld2w.s r4, @\(r0, r6\) -> adds.s r5, r19, r20 37 d8: 04604006 88603154 ld2w.s r4, @\(r0, r6\) -> adds.s r3, r5, r20 38 e0: 04604006 086064d4 ld2w.s r4, @\(r0, r6\) || adds.s r6, r19, r20 39 e8: 04604006 086074d4 ld2w.s r4, @\(r0, r6\) || adds.s r7, r19, r20 40 f0: 04604006 08607014 ld2w.s r4, @\(r0, r6\) || adds.s r7, r0, r20 68 1a0: 0460e38f 8a610452 ld2w.s r14, @\(r14, r15\) -> mulhxhl r16, r17, r18
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warn_oddreg.l | 14 2 # of multi-word instructions: ld2w, ld4bh, ld4bhu, ld2h, st2w, st4hb, st2h, 20 6 0008 04681000 ld2w r1, @(r0, 0) || nop
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reloc.s | 50 ld2w r60, @(r0,longzero)
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inst.s | 201 ld2w r6,@(r7,r8) 202 ld2w r6,@(r7+,r8) 203 ld2w r6,@(r7-,r8) 204 ld2w r6,@(r7,0x1a) 205 ld2w r6,@(r7,0x1234)
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reloc.d | 72 1018: 846bc000 80001070 ld2w.l r60, @\(r0, 0x1070\)
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inst.d | 123 388: 046061c8 846461c8 ld2w.s r6, @\(r7, r8\) -> ld2w.s r6, @\(r7\+, r8\) 124 390: 046c61c8 846861da ld2w.s r6, @\(r7-, r8\) -> ld2w.s r6, @\(r7, 0x1a\) 125 398: 846861c0 80001234 ld2w.l r6, @\(r7, 0x1234\)
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/toolchain/binutils/binutils-2.25/gas/doc/ |
c-d10v.texi | 133 @item ld2w r2,@@r8+ || mac a0,r0,r7 135 @item ld2w r2,@@r8+ || 138 @item ld2w r2,@@r8+ 142 @item ld2w r2,@@r8+ ->
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/toolchain/binutils/binutils-2.25/include/opcode/ |
d30v.h | 85 #define SHORT_M2 5 /* for ld2w and st2w */ 121 #define LONG_M2 62 /* Memory long for ld2w, st2w */
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/toolchain/binutils/binutils-2.25/opcodes/ |
d10v-opc.c | 235 { "ld2w", LONG_L, 1, MU, SEQ, 0x31000000, 0x3f100000, { RDSTE, ATPAR, NUM16, RSRC } }, 236 { "ld2w", SHORT_2, 1, MU, PAR|RMEM, 0x6601, 0x7e21, { RDSTE, ATSIGN, RSRC, MINUS } }, 237 { "ld2w", SHORT_2, 1, MU, PAR|RMEM, 0x6201, 0x7e21, { RDSTE, ATSIGN, RSRC, PLUS } }, 238 { "ld2w", SHORT_2, 1, MU, PAR|RMEM, 0x6200, 0x7e21, { RDSTE, ATSIGN, RSRC } }, 239 { "ld2w", LONG_L, 1, MU, SEQ, 0x33010000, 0x3f1f0000, { RDSTE, ATSIGN, NUM16 } },
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d30v-opc.c | 258 { "ld2w", IMEM, 0x6, { SHORT_M2, LONG_M2 }, MU, FLAG_MEM | FLAG_NOT_WITH_ADDSUBppp, 0, 0 },
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/toolchain/binutils/binutils-2.25/gas/config/ |
tc-d30v.c | 822 registers, for example ld2w. */ [all...] |