| /art/runtime/interpreter/mterp/mips/ |
| op_iget_char_quick.S | 1 %include "mips/op_iget_quick.S" { "load":"lhu" }
|
| op_aget_char.S | 1 %include "mips/op_aget.S" { "load":"lhu", "shift":"1", "data_offset":"MIRROR_CHAR_ARRAY_DATA_OFFSET" }
|
| /art/runtime/interpreter/mterp/mips64/ |
| op_iget_char_quick.S | 1 %include "mips64/op_iget_quick.S" { "load":"lhu" }
|
| op_aget_char.S | 1 %include "mips64/op_aget.S" { "load":"lhu", "shift":"1", "data_offset":"MIRROR_CHAR_ARRAY_DATA_OFFSET" }
|
| op_move_16.S | 4 lhu a3, 4(rPC) # a3 <- BBBB
5 lhu a2, 2(rPC) # a2 <- AAAA
|
| op_move_wide_16.S | 3 lhu a3, 4(rPC) # a3 <- BBBB
4 lhu a2, 2(rPC) # a2 <- AAAA
|
| op_const_class.S | 4 lhu a0, 2(rPC) # a0 <- BBBB
|
| op_const_string.S | 4 lhu a0, 2(rPC) # a0 <- BBBB
|
| op_move_from16.S | 4 lhu a3, 2(rPC) # a3 <- BBBB
|
| op_move_wide_from16.S | 3 lhu a3, 2(rPC) # a3 <- BBBB
|
| op_sget_wide.S | 8 lhu a0, 2(rPC) # a0 <- field ref BBBB
|
| op_check_cast.S | 7 lhu a0, 2(rPC) # a0 <- BBBB
|
| op_iget_object_quick.S | 5 lhu a1, 2(rPC) # a1 <- field byte offset
|
| op_iget_wide.S | 8 lhu a0, 2(rPC) # a0 <- field ref CCCC
|
| op_iget_wide_quick.S | 3 lhu a4, 2(rPC) # a4 <- field byte offset
|
| op_iput.S | 10 lhu a0, 2(rPC) # a0 <- field ref CCCC
|
| op_iput_wide.S | 4 lhu a0, 2(rPC) # a0 <- field ref CCCC
|
| op_iput_wide_quick.S | 3 lhu a3, 2(rPC) # a3 <- field byte offset
|
| op_sget.S | 10 lhu a0, 2(rPC) # a0 <- field ref BBBB
|
| op_sput.S | 10 lhu a0, 2(rPC) # a0 <- field ref BBBB
|
| op_sput_wide.S | 8 lhu a0, 2(rPC) # a0 <- field ref BBBB
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| ld-zero.s | 6 lhu $0, 0x12345678($2)
|
| /external/skia/src/opts/ |
| SkBitmapProcState_opts_mips_dsp.cpp | 44 "lhu $t0, 0(%[xx]) \n\t"
45 "lhu $t1, 2(%[xx]) \n\t"
46 "lhu $t2, 4(%[xx]) \n\t"
47 "lhu $t3, 6(%[xx]) \n\t"
48 "lhu $t4, 8(%[xx]) \n\t"
49 "lhu $t5, 10(%[xx]) \n\t"
50 "lhu $t6, 12(%[xx]) \n\t"
51 "lhu $t7, 14(%[xx]) \n\t"
52 "lhu %[s0], 16(%[xx]) \n\t"
53 "lhu %[s1], 18(%[xx]) \n\t
[all...] |
| /art/runtime/arch/mips/ |
| memcmp16_mips.S | 30 1: lhu $t0,0($a0)
31 lhu $t1,0($a1)
|
| /art/runtime/arch/mips64/ |
| memcmp16_mips64.S | 34 lhu $t0, 0($a0)
35 lhu $t1, 0($a1)
|
