| /external/llvm/test/Transforms/InstCombine/ |
| x86-pmovsx.ll | 5 declare <8 x i16> @llvm.x86.sse41.pmovsxbw(<16 x i8>) nounwind readnone
12 declare <16 x i16> @llvm.x86.avx2.pmovsxbw(<16 x i8>) nounwind readnone
47 %res = call <8 x i16> @llvm.x86.sse41.pmovsxbw(<16 x i8> %v)
106 %res = call <16 x i16> @llvm.x86.avx2.pmovsxbw(<16 x i8> %v)
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| sse4_1.s | 66 pmovsxbw %xmm1,%xmm0
67 pmovsxbw (%ecx),%xmm0
161 pmovsxbw xmm0,xmm1
162 pmovsxbw xmm0,QWORD PTR [ecx]
|
| x86-64-sse4_1.s | 74 pmovsxbw %xmm1,%xmm0
75 pmovsxbw (%rcx),%xmm0
177 pmovsxbw xmm0,xmm1
178 pmovsxbw xmm0,QWORD PTR [rcx]
|
| simd.s | 69 pmovsxbw (%eax),%xmm0
168 pmovsxbw xmm0,QWORD PTR [eax] label
|
| x86-64-simd.s | 89 pmovsxbw (%rax),%xmm0
216 pmovsxbw xmm0,QWORD PTR [rax] label
|
| sse4_1-intel.d | 71 [ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw xmm0,xmm1
72 [ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw xmm0,QWORD PTR \[ecx\]
164 [ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw xmm0,xmm1
165 [ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw xmm0,QWORD PTR \[ecx\]
|
| sse4_1.d | 70 [ ]*[0-9a-f]+: 66 0f 38 20 c1 pmovsxbw %xmm1,%xmm0
71 [ ]*[0-9a-f]+: 66 0f 38 20 01 pmovsxbw \(%ecx\),%xmm0
163 [ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw %xmm1,%xmm0
164 [ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw \(%ecx\),%xmm0
|
| x86-64-sse4_1-intel.d | 79 [ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw xmm0,xmm1
80 [ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw xmm0,QWORD PTR \[rcx\]
180 [ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw xmm0,xmm1
181 [ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw xmm0,QWORD PTR \[rcx\]
|
| x86-64-sse4_1.d | 78 [ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw %xmm1,%xmm0
79 [ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw \(%rcx\),%xmm0
179 [ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw %xmm1,%xmm0
180 [ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw \(%rcx\),%xmm0
|
| sse2avx.s | 428 pmovsxbw %xmm4,%xmm6
429 pmovsxbw (%ecx),%xmm4
1089 pmovsxbw xmm6,xmm4
1090 pmovsxbw xmm4,QWORD PTR [ecx]
|
| x86-64-sse2avx.s | 428 pmovsxbw %xmm4,%xmm6
429 pmovsxbw (%rcx),%xmm4
1132 pmovsxbw xmm6,xmm4
1133 pmovsxbw xmm4,QWORD PTR [rcx]
|
| simd-intel.d | 75 [ ]*[a-f0-9]+: 66 0f 38 20 00 pmovsxbw xmm0,QWORD PTR \[eax\]
168 [ ]*[a-f0-9]+: 66 0f 38 20 00 pmovsxbw xmm0,QWORD PTR \[eax\]
|
| simd-suffix.d | 75 [ ]*[a-f0-9]+: 66 0f 38 20 00 pmovsxbw \(%eax\),%xmm0
168 [ ]*[a-f0-9]+: 66 0f 38 20 00 pmovsxbw \(%eax\),%xmm0
|
| simd.d | 74 [ ]*[a-f0-9]+: 66 0f 38 20 00 pmovsxbw \(%eax\),%xmm0
167 [ ]*[a-f0-9]+: 66 0f 38 20 00 pmovsxbw \(%eax\),%xmm0
|
| /external/llvm/test/CodeGen/X86/ |
| sse41-intrinsics-x86-upgrade.ll | 78 ; CHECK: pmovsxbw
79 %res = call <8 x i16> @llvm.x86.sse41.pmovsxbw(<16 x i8> %a0) ; <<8 x i16>> [#uses=1]
82 declare <8 x i16> @llvm.x86.sse41.pmovsxbw(<16 x i8>) nounwind readnone
|
| avx2-pmovxrm-intrinsics.ll | 7 %2 = call <16 x i16> @llvm.x86.avx2.pmovsxbw(<16 x i8> %1)
110 declare <16 x i16> @llvm.x86.avx2.pmovsxbw(<16 x i8>)
|
| pmul.ll | 26 ; SSE41-NEXT: pmovsxbw %xmm0, %xmm1
27 ; SSE41-NEXT: pmovsxbw {{.*}}(%rip), %xmm2
32 ; SSE41-NEXT: pmovsxbw %xmm0, %xmm0
147 ; SSE41-NEXT: pmovsxbw %xmm1, %xmm3
148 ; SSE41-NEXT: pmovsxbw %xmm0, %xmm2
153 ; SSE41-NEXT: pmovsxbw %xmm1, %xmm1
155 ; SSE41-NEXT: pmovsxbw %xmm0, %xmm0
|
| avx-intrinsics-x86-upgrade.ll | 175 %res = call <8 x i16> @llvm.x86.sse41.pmovsxbw(<16 x i8> %a0) ; <<8 x i16>> [#uses=1]
178 declare <8 x i16> @llvm.x86.sse41.pmovsxbw(<16 x i8>) nounwind readnone
|
| pmovsx-inreg.ll | 72 ; SSE41: pmovsxbw
|
| sse41-pmovxrm-intrinsics.ll | 8 ; SSE41-NEXT: pmovsxbw (%rdi), %xmm0
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| x86-64-sse4_1-intel.d | 79 [ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw xmm0,xmm1
80 [ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw xmm0,QWORD PTR \[rcx\]
180 [ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw xmm0,xmm1
181 [ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw xmm0,QWORD PTR \[rcx\]
|
| x86-64-sse4_1.d | 79 [ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw %xmm1,%xmm0
80 [ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw \(%rcx\),%xmm0
180 [ ]*[a-f0-9]+: 66 0f 38 20 c1 pmovsxbw %xmm1,%xmm0
181 [ ]*[a-f0-9]+: 66 0f 38 20 01 pmovsxbw \(%rcx\),%xmm0
|
| x86-64-simd-intel.d | 95 [ ]*[a-f0-9]+: 66 0f 38 20 00 pmovsxbw xmm0,QWORD PTR \[rax\]
214 [ ]*[a-f0-9]+: 66 0f 38 20 00 pmovsxbw xmm0,QWORD PTR \[rax\]
|
| x86-64-simd-suffix.d | 95 [ ]*[a-f0-9]+: 66 0f 38 20 00 pmovsxbw \(%rax\),%xmm0
214 [ ]*[a-f0-9]+: 66 0f 38 20 00 pmovsxbw \(%rax\),%xmm0
|
| x86-64-simd.d | 95 [ ]*[a-f0-9]+: 66 0f 38 20 00 pmovsxbw \(%rax\),%xmm0
214 [ ]*[a-f0-9]+: 66 0f 38 20 00 pmovsxbw \(%rax\),%xmm0
|
