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  /external/llvm/test/CodeGen/X86/
pr14161.ll 10 ; CHECK-NEXT: pmovzxwq %xmm0, %xmm0
30 ; CHECK-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
trunc-ext-ld-st.ll 21 ;CHECK: pmovzxwq
avx2-pmovxrm-intrinsics.ll 87 %2 = call <4 x i64> @llvm.x86.avx2.pmovzxwq(<8 x i16> %1)
100 declare <4 x i64> @llvm.x86.avx2.pmovzxwq(<8 x i16>)
sse41-pmovxrm-intrinsics.ll 164 ; SSE41-NEXT: pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
172 %2 = call <2 x i64> @llvm.x86.sse41.pmovzxwq(<8 x i16> %1)
192 declare <2 x i64> @llvm.x86.sse41.pmovzxwq(<8 x i16>)
widen_load-2.ll 148 ; CHECK-NEXT: pmovzxwq %[[R1]], %[[R0]]
184 ; CHECK-NEXT: pmovzxwq %[[CONSTANT0]], %[[CONSTANT0]]
190 ; CHECK-NEXT: pmovzxwq %[[CONSTANT1]], %[[CONSTANT1]]
200 ; CHECK-NEXT: pmovzxwq %[[X1]], %[[X3:xmm[0-9]+]]
sse41-intrinsics-x86.ll 206 ; CHECK: pmovzxwq
207 %res = call <2 x i64> @llvm.x86.sse41.pmovzxwq(<8 x i16> %a0) ; <<2 x i64>> [#uses=1]
210 declare <2 x i64> @llvm.x86.sse41.pmovzxwq(<8 x i16>) nounwind readnone
vector-zext.ll 325 ; SSE41-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
361 ; SSE41-NEXT: pmovzxwq {{.*#+}} xmm2 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
363 ; SSE41-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
    [all...]
  /external/llvm/test/Transforms/InstCombine/
x86-pmovzx.ll 8 declare <2 x i64> @llvm.x86.sse41.pmovzxwq(<8 x i16>) nounwind readnone
15 declare <4 x i64> @llvm.x86.avx2.pmovzxwq(<8 x i16>) nounwind readnone
77 %res = call <2 x i64> @llvm.x86.sse41.pmovzxwq(<8 x i16> %v)
134 %res = call <4 x i64> @llvm.x86.avx2.pmovzxwq(<8 x i16> %v)
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
sse4_1.s 86 pmovzxwq %xmm1,%xmm0
87 pmovzxwq (%ecx),%xmm0
181 pmovzxwq xmm0,xmm1
182 pmovzxwq xmm0,DWORD PTR [ecx]
x86-64-sse4_1.s 94 pmovzxwq %xmm1,%xmm0
95 pmovzxwq (%rcx),%xmm0
197 pmovzxwq xmm0,xmm1
198 pmovzxwq xmm0,DWORD PTR [rcx]
simd.s 79 pmovzxwq (%eax),%xmm0
178 pmovzxwq xmm0,DWORD PTR [eax] label
x86-64-simd.s 99 pmovzxwq (%rax),%xmm0
226 pmovzxwq xmm0,DWORD PTR [rax] label
sse4_1-intel.d 91 [ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq xmm0,xmm1
92 [ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq xmm0,DWORD PTR \[ecx\]
184 [ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq xmm0,xmm1
185 [ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq xmm0,DWORD PTR \[ecx\]
sse4_1.d 90 [ ]*[0-9a-f]+: 66 0f 38 34 c1 pmovzxwq %xmm1,%xmm0
91 [ ]*[0-9a-f]+: 66 0f 38 34 01 pmovzxwq \(%ecx\),%xmm0
183 [ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq %xmm1,%xmm0
184 [ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq \(%ecx\),%xmm0
x86-64-sse4_1-intel.d 99 [ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq xmm0,xmm1
100 [ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq xmm0,DWORD PTR \[rcx\]
200 [ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq xmm0,xmm1
201 [ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq xmm0,DWORD PTR \[rcx\]
x86-64-sse4_1.d 98 [ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq %xmm1,%xmm0
99 [ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq \(%rcx\),%xmm0
199 [ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq %xmm1,%xmm0
200 [ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq \(%rcx\),%xmm0
sse2avx.s 557 pmovzxwq %xmm4,%xmm6
558 pmovzxwq (%ecx),%xmm4
1218 pmovzxwq xmm6,xmm4
1219 pmovzxwq xmm4,DWORD PTR [ecx]
x86-64-sse2avx.s 581 pmovzxwq %xmm4,%xmm6
582 pmovzxwq (%rcx),%xmm4
1285 pmovzxwq xmm6,xmm4
1286 pmovzxwq xmm4,DWORD PTR [rcx]
simd-intel.d 85 [ ]*[a-f0-9]+: 66 0f 38 34 00 pmovzxwq xmm0,DWORD PTR \[eax\]
178 [ ]*[a-f0-9]+: 66 0f 38 34 00 pmovzxwq xmm0,DWORD PTR \[eax\]
simd-suffix.d 85 [ ]*[a-f0-9]+: 66 0f 38 34 00 pmovzxwq \(%eax\),%xmm0
178 [ ]*[a-f0-9]+: 66 0f 38 34 00 pmovzxwq \(%eax\),%xmm0
simd.d 84 [ ]*[a-f0-9]+: 66 0f 38 34 00 pmovzxwq \(%eax\),%xmm0
177 [ ]*[a-f0-9]+: 66 0f 38 34 00 pmovzxwq \(%eax\),%xmm0
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/
x86-64-sse4_1-intel.d 99 [ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq xmm0,xmm1
100 [ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq xmm0,DWORD PTR \[rcx\]
200 [ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq xmm0,xmm1
201 [ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq xmm0,DWORD PTR \[rcx\]
x86-64-sse4_1.d 99 [ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq %xmm1,%xmm0
100 [ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq \(%rcx\),%xmm0
200 [ ]*[a-f0-9]+: 66 0f 38 34 c1 pmovzxwq %xmm1,%xmm0
201 [ ]*[a-f0-9]+: 66 0f 38 34 01 pmovzxwq \(%rcx\),%xmm0
x86-64-simd-intel.d 105 [ ]*[a-f0-9]+: 66 0f 38 34 00 pmovzxwq xmm0,DWORD PTR \[rax\]
224 [ ]*[a-f0-9]+: 66 0f 38 34 00 pmovzxwq xmm0,DWORD PTR \[rax\]
  /external/clang/test/CodeGen/
sse41-builtins.c 137 // CHECK: call <2 x i64> @llvm.x86.sse41.pmovzxwq(<8 x i16> {{.*}})

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