/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
reg.s | 9 psllw $2, %mm6 label 10 psllw $2, %xmm6 label 29 psllw mm6, 2 label 30 psllw xmm6, 2 label
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x86-64-reg.s | 9 psllw $2, %mm6 label 10 psllw $2, %xmm10 label 29 psllw mm6, 2 label 30 psllw xmm2, 2 label
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reg-intel.d | 15 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw mm6,0x2 16 [ ]*[a-f0-9]+: 66 0f 71 f6 02 psllw xmm6,0x2 33 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw mm6,0x2 34 [ ]*[a-f0-9]+: 66 0f 71 f6 02 psllw xmm6,0x2
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x86-64-reg-intel.d | 15 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw mm6,0x2 16 [ ]*[a-f0-9]+: 66 41 0f 71 f2 02 psllw xmm10,0x2 33 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw mm6,0x2 34 [ ]*[a-f0-9]+: 66 0f 71 f2 02 psllw xmm2,0x2
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reg.d | 13 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw \$0x2,%mm6 14 [ ]*[a-f0-9]+: 66 0f 71 f6 02 psllw \$0x2,%xmm6 31 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw \$0x2,%mm6 32 [ ]*[a-f0-9]+: 66 0f 71 f6 02 psllw \$0x2,%xmm6
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x86-64-reg.d | 14 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw \$0x2,%mm6 15 [ ]*[a-f0-9]+: 66 41 0f 71 f2 02 psllw \$0x2,%xmm10 32 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw \$0x2,%mm6 33 [ ]*[a-f0-9]+: 66 0f 71 f2 02 psllw \$0x2,%xmm2
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/external/llvm/test/CodeGen/X86/ |
2011-12-15-vec_shift.ll | 9 ; CHECK-W-SSE4: psllw $4, [[REG1:%xmm.]] 11 ; CHECK-W-SSE4: psllw $2 14 ; CHECK-WO-SSE4: psllw $5, [[REG1:%xmm.]]
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vector-shift-shl-128.ll | 141 ; SSE2-NEXT: psllw $12, %xmm1 146 ; SSE2-NEXT: psllw $8, %xmm0 154 ; SSE2-NEXT: psllw $4, %xmm0 162 ; SSE2-NEXT: psllw $2, %xmm0 169 ; SSE2-NEXT: psllw $1, %xmm0 178 ; SSE41-NEXT: psllw $12, %xmm0 179 ; SSE41-NEXT: psllw $4, %xmm1 184 ; SSE41-NEXT: psllw $8, %xmm4 188 ; SSE41-NEXT: psllw $4, %xmm1 192 ; SSE41-NEXT: psllw $2, %xmm [all...] |
vector-rotate-128.ll | 261 ; SSE2-NEXT: psllw $12, %xmm1 265 ; SSE2-NEXT: psllw $8, %xmm4 274 ; SSE2-NEXT: psllw $4, %xmm2 282 ; SSE2-NEXT: psllw $2, %xmm2 289 ; SSE2-NEXT: psllw $1, %xmm2 291 ; SSE2-NEXT: psllw $12, %xmm3 332 ; SSE41-NEXT: psllw $12, %xmm0 333 ; SSE41-NEXT: psllw $4, %xmm1 338 ; SSE41-NEXT: psllw $8, %xmm6 343 ; SSE41-NEXT: psllw $4, %xmm [all...] |
vshift-1.ll | 54 ; CHECK: psllw 66 ; CHECK-NEXT: psllw
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vec_shift.ll | 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllw
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/external/libvpx/libvpx/vp9/encoder/x86/ |
vp9_dct_mmx.asm | 63 psllw m0, 2 64 psllw m1, 2 65 psllw m2, 2 66 psllw m3, 2
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/external/libvpx/libvpx/vpx_dsp/x86/ |
fwd_txfm_ssse3_x86_64.asm | 152 psllw m0, 2 153 psllw m1, 2 154 psllw m2, 2 155 psllw m3, 2 156 psllw m4, 2 157 psllw m5, 2 158 psllw m6, 2 159 psllw m7, 2
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
x86-64-reg-intel.d | 15 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw mm6,0x2 16 [ ]*[a-f0-9]+: 66 41 0f 71 f2 02 psllw xmm10,0x2 33 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw mm6,0x2 34 [ ]*[a-f0-9]+: 66 0f 71 f2 02 psllw xmm2,0x2
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x86-64-reg.d | 15 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw \$0x2,%mm6 16 [ ]*[a-f0-9]+: 66 41 0f 71 f2 02 psllw \$0x2,%xmm10 33 [ ]*[a-f0-9]+: 0f 71 f6 02 psllw \$0x2,%mm6 34 [ ]*[a-f0-9]+: 66 0f 71 f2 02 psllw \$0x2,%xmm2
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/external/libvpx/libvpx/vp8/encoder/x86/ |
dct_mmx.asm | 73 psllw mm5, 3 74 psllw mm4, 3 76 psllw mm0, 3 77 psllw mm1, 3
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dct_sse2.asm | 90 psllw xmm0, 3 ;b1 <<= 3 a1 <<= 3 91 psllw xmm3, 3 ;c1 <<= 3 d1 <<= 3 225 psllw xmm5, 3 226 psllw xmm4, 3 228 psllw xmm0, 3 229 psllw xmm1, 3
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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/x86/ |
dct_mmx.asm | 73 psllw mm5, 3 74 psllw mm4, 3 76 psllw mm0, 3 77 psllw mm1, 3
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dct_sse2.asm | 90 psllw xmm0, 3 ;b1 <<= 3 a1 <<= 3 91 psllw xmm3, 3 ;c1 <<= 3 d1 <<= 3 225 psllw xmm5, 3 226 psllw xmm4, 3 228 psllw xmm0, 3 229 psllw xmm1, 3
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/external/libjpeg-turbo/simd/ |
jfdctfst-mmx.asm | 184 psllw mm0,PRE_MULTIPLY_SCALE_BITS 208 psllw mm2,PRE_MULTIPLY_SCALE_BITS 209 psllw mm6,PRE_MULTIPLY_SCALE_BITS 211 psllw mm3,PRE_MULTIPLY_SCALE_BITS 325 psllw mm0,PRE_MULTIPLY_SCALE_BITS 349 psllw mm2,PRE_MULTIPLY_SCALE_BITS 350 psllw mm6,PRE_MULTIPLY_SCALE_BITS 352 psllw mm3,PRE_MULTIPLY_SCALE_BITS
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jfdctfst-sse2-64.asm | 194 psllw xmm6,PRE_MULTIPLY_SCALE_BITS 215 psllw xmm2,PRE_MULTIPLY_SCALE_BITS 216 psllw xmm0,PRE_MULTIPLY_SCALE_BITS 218 psllw xmm5,PRE_MULTIPLY_SCALE_BITS 330 psllw xmm5,PRE_MULTIPLY_SCALE_BITS 354 psllw xmm7,PRE_MULTIPLY_SCALE_BITS 355 psllw xmm1,PRE_MULTIPLY_SCALE_BITS 357 psllw xmm0,PRE_MULTIPLY_SCALE_BITS
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jfdctfst-sse2.asm | 200 psllw xmm6,PRE_MULTIPLY_SCALE_BITS 221 psllw xmm2,PRE_MULTIPLY_SCALE_BITS 222 psllw xmm0,PRE_MULTIPLY_SCALE_BITS 224 psllw xmm5,PRE_MULTIPLY_SCALE_BITS 338 psllw xmm5,PRE_MULTIPLY_SCALE_BITS 362 psllw xmm7,PRE_MULTIPLY_SCALE_BITS 363 psllw xmm1,PRE_MULTIPLY_SCALE_BITS 365 psllw xmm0,PRE_MULTIPLY_SCALE_BITS
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jidctfst-mmx.asm | 189 psllw mm1,PRE_MULTIPLY_SCALE_BITS 222 psllw mm2,PRE_MULTIPLY_SCALE_BITS 223 psllw mm5,PRE_MULTIPLY_SCALE_BITS 229 psllw mm4,PRE_MULTIPLY_SCALE_BITS 347 psllw mm1,PRE_MULTIPLY_SCALE_BITS 376 psllw mm2,PRE_MULTIPLY_SCALE_BITS 377 psllw mm5,PRE_MULTIPLY_SCALE_BITS 383 psllw mm4,PRE_MULTIPLY_SCALE_BITS
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/external/mesa3d/src/mesa/x86/ |
mmx_blend.S | 101 PSLLW ( CONST(8), MQ1 ) /* q1 << 8 */ ;\ 105 TWO(PSLLW ( CONST(8), MQ2 )) /* q2 << 8 */ ;\ 132 PSLLW ( CONST(8), MQ1 ) /* q1 << 8 */ ;\ 136 TWO(PSLLW ( CONST(8), MQ2 )) /* q2 << 8 */ ;\ 142 PSLLW ( CONST(8), MP1 ) /* q1 > p1 ? 0x100 : 0 */ ;\ 143 TWO(PSLLW ( CONST(8), MP2 )) /* q2 > q2 ? 0x100 : 0 */ ;\ 177 PSLLW ( CONST(8), MQ1 ) /* q1 << 8 */ ;\ 181 TWO(PSLLW ( CONST(8), MQ2 )) /* q2 << 8 */ ;\
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/external/llvm/test/Analysis/CostModel/X86/ |
testshiftshl.ll | 34 ; SSE2-CODEGEN: psllw 46 ; SSE2-CODEGEN: psllw 58 ; SSE2-CODEGEN: psllw 214 ; SSE2-CODEGEN: psllw 226 ; SSE2-CODEGEN: psllw 238 ; SSE2-CODEGEN: psllw 276 ; SSE2-CODEGEN: psllw $3 290 ; SSE2-CODEGEN: psllw $3 306 ; SSE2-CODEGEN: psllw $3 490 ; SSE2-CODEGEN: psllw $ [all...] |