| /external/clang/test/CodeGen/ |
| BasicInstrs.c | 19 _Bool setlt(int X, int Y) { function
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| /external/llvm/test/Transforms/InstCombine/ |
| setcc-strength-reduce.ll | 2 ; working. Basically this boils down to converting setlt,gt,le,ge instructions
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| /external/llvm/test/CodeGen/PowerPC/ |
| ppc-vaarg-agg.ll | 44 ; with an error like: Cannot select: ch = setlt [ID=6]
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| /external/llvm/test/Transforms/LoopStrengthReduce/ |
| dont-hoist-simple-loop-constants.ll | 4 ; The setlt wants to use a value that is incremented one more than the dominant
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSelectCCInfo.td | 43 IntRegs:$fval, SETLT)),
111 // setlt-64 -> setgt-64.
113 DoubleRegs:$fval, SETLT)),
|
| HexagonInstrInfoVector.td | 355 def: InvertCmp_pat<A4_vcmpbgt, setlt, V8I8, i1>;
356 def: InvertCmp_pat<A4_vcmpbgt, setlt, V8I8, v8i1>;
357 def: InvertCmp_pat<A2_vcmphgt, setlt, V4I16, i1>;
358 def: InvertCmp_pat<A2_vcmphgt, setlt, V4I16, v4i1>;
359 def: InvertCmp_pat<A2_vcmpwgt, setlt, V2I32, i1>;
360 def: InvertCmp_pat<A2_vcmpwgt, setlt, V2I32, v2i1>;
|
| HexagonInstrInfoV5.td | 494 def: Pat<(i1 (setlt F32:$src1, F32:$src2)),
496 def: Pat<(i1 (setlt F32:$src1, fpimm:$src2)),
498 def: Pat<(i1 (setlt F64:$src1, F64:$src2)),
500 def: Pat<(i1 (setlt F64:$src1, fpimm:$src2)),
[all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyInstrFloat.td | 67 def : Pat<(setlt f32:$lhs, f32:$rhs), (LT_F32 f32:$lhs, f32:$rhs)>;
73 def : Pat<(setlt f64:$lhs, f64:$rhs), (LT_F64 f64:$lhs, f64:$rhs)>;
|
| WebAssemblyInstrInteger.td | 44 defm LT_S : ComparisonInt<SETLT, "lt_s">;
|
| /external/llvm/utils/emacs/ |
| llvm-mode.el | 44 "setne" "seteq" "setlt" "setgt" "setle" "setge") 'symbols) . font-lock-keyword-face)
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUInstructions.td | 67 case ISD::SETLT: return true;}}}]
|
| AMDILISelLowering.cpp | 601 ISD::SETLT);
608 ISD::SETLT);
707 SDValue r10 = DAG.getSetCC(DL, OVT, r0, DAG.getConstant(0, OVT), ISD::SETLT);
710 SDValue r11 = DAG.getSetCC(DL, OVT, r1, DAG.getConstant(0, OVT), ISD::SETLT);
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| /prebuilts/go/darwin-x86/pkg/bootstrap/src/bootstrap/internal/obj/x86/ |
| anames.go | 200 "SETLT",
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| /prebuilts/go/darwin-x86/src/cmd/internal/obj/x86/ |
| anames.go | 197 "SETLT",
|
| /prebuilts/go/linux-x86/pkg/bootstrap/src/bootstrap/internal/obj/x86/ |
| anames.go | 200 "SETLT",
|
| /prebuilts/go/linux-x86/src/cmd/internal/obj/x86/ |
| anames.go | 197 "SETLT",
|
| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.td | [all...] |
| Mips64InstrInfo.td | 106 def SLTi64 : SetCC_I<"slti", setlt, simm16_64, immSExt16, GPR64Opnd>,
130 def SLT64 : SetCC_R<"slt", setlt, GPR64Opnd>, ADD_FM<0, 0x2a>;
213 def BLTZ64 : CBranchZero<"bltz", brtarget, setlt, GPR64Opnd>, BGEZ_FM<1, 0>;
490 def : MipsPat<(brcond (i32 (setlt i64:$lhs, 1)), bb:$dst),
|
| MicroMipsInstrInfo.td | 674 def SLTi_MM : MMRel, SetCC_I<"slti", setlt, simm16, immSExt16, GPR32Opnd>,
697 def SLT_MM : MMRel, SetCC_R<"slt", setlt, GPR32Opnd>, ADD_FM_MM<0, 0x350>;
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | 149 case ISD::SETLT:
[all...] |
| SelectionDAGDumper.cpp | 349 case ISD::SETLT: return "setlt";
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrQPX.td | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | [all...] |
| /external/clang/www/demo/ |
| index.cgi | 99 $input =~ s@\b(add|sub|mul|div|rem|and|or|xor|setne|seteq|setlt|setgt|setle|setge|phi|tail|call|cast|to|shl|shr|vaarg|vanext|ret|br|switch|invoke|unwind|malloc|alloca|free|load|store|getelementptr|begin|end|true|false|declare|global|constant|const|internal|uninitialized|external|implementation|linkonce|weak|appending|null|to|except|not|target|endian|pointersize|big|little|volatile)\b@<span class="llvm_keyword">$1</span>@g;
|
| /external/llvm/lib/CodeGen/ |
| Analysis.cpp | 189 case ISD::SETOLT: case ISD::SETULT: return ISD::SETLT;
208 case ICmpInst::ICMP_SLT: return ISD::SETLT;
|
