| /external/llvm/test/CodeGen/AArch64/ |
| arm64-neon-simd-vget.ll | 7 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
8 ret <8 x i8> %shuffle.i
15 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
16 ret <4 x i16> %shuffle.i
23 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 2, i32 3>
24 ret <2 x i32> %shuffle.i
31 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> undef, <1 x i32> <i32 1>
32 ret <1 x i64> %shuffle.i
39 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
40 ret <8 x i8> %shuffle.
[all...] |
| arm64-vcombine.ll | 11 %shuffle.i = shufflevector <2 x i64> %0, <2 x i64> undef, <1 x i32> zeroinitializer
13 %shuffle.i4 = shufflevector <2 x i64> %1, <2 x i64> undef, <1 x i32> zeroinitializer
14 %shuffle.i3 = shufflevector <1 x i64> %shuffle.i, <1 x i64> %shuffle.i4, <2 x i32> <i32 0, i32 1>
15 %2 = bitcast <2 x i64> %shuffle.i3 to <16 x i8>
|
| neon-perm.ll | 26 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
27 ret <8 x i8> %shuffle.i
34 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
35 ret <16 x i8> %shuffle.i
42 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
43 ret <4 x i16> %shuffle.i
50 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
51 ret <8 x i16> %shuffle.i
58 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
59 ret <2 x i32> %shuffle.
[all...] |
| arm64-neon-2velem.ll | 50 %shuffle = shufflevector <4 x i16> %v, <4 x i16> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
51 %mul = mul <4 x i16> %shuffle, %b
61 %shuffle = shufflevector <4 x i16> %v, <4 x i16> undef, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
62 %mul = mul <8 x i16> %shuffle, %b
72 %shuffle = shufflevector <2 x i32> %v, <2 x i32> undef, <2 x i32> <i32 1, i32 1>
73 %mul = mul <2 x i32> %shuffle, %b
83 %shuffle = shufflevector <2 x i32> %v, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1>
84 %mul = mul <4 x i32> %shuffle, %b
94 %shuffle = shufflevector <8 x i16> %v, <8 x i16> undef, <4 x i32> <i32 7, i32 7, i32 7, i32 7>
95 %mul = mul <4 x i16> %shuffle, %
[all...] |
| concat_vector-truncate-combine.ll | 15 %shuffle = shufflevector <2 x i16> %at, <2 x i16> %bt, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
16 ret <4 x i16> %shuffle
27 %shuffle = shufflevector <4 x i8> %at, <4 x i8> %bt, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
28 ret <8 x i8> %shuffle
39 %shuffle = shufflevector <4 x i16> %at, <4 x i16> %bt, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
40 ret <8 x i16> %shuffle
|
| neon-diagnostics.ll | 8 %shuffle = shufflevector <2 x float> %v, <2 x float> undef, <2 x i32> <i32 1, i32 1>
9 %mul = fmul <2 x float> %shuffle, %b
21 %shuffle.i = shufflevector <1 x i64> %1, <1 x i64> %3, <2 x i32> <i32 0, i32 1>
22 %4 = bitcast <2 x i64> %shuffle.i to <4 x i32>
|
| neon-scalar-copy.ll | 85 %shuffle.i = shufflevector <16 x i8> %v1, <16 x i8> undef, <1 x i32> <i32 14>
86 ret <1 x i8> %shuffle.i
93 %shuffle.i = shufflevector <8 x i8> %v1, <8 x i8> undef, <1 x i32> <i32 7>
94 ret <1 x i8> %shuffle.i
102 %shuffle.i = shufflevector <8 x i16> %v1, <8 x i16> undef, <1 x i32> <i32 7>
103 ret <1 x i16> %shuffle.i
110 %shuffle.i = shufflevector <4 x i16> %v1, <4 x i16> undef, <1 x i32> <i32 3>
111 ret <1 x i16> %shuffle.i
119 %shuffle = shufflevector <4 x i32> %v1, <4 x i32> undef, <1 x i32> <i32 3>
120 ret <1 x i32> %shuffle
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| 2009-06-18-movlp-shuffle-register.ll | 7 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4,i32
9 ret <4 x float> %shuffle
|
| shuffle-combine-crash.ll | 5 ; (shuffle (shuffle A, Undef, M0), Undef, M1) -> (shuffle A, Undef, M2)
8 ; the resulting shuffle dag node is not legal for the target.
9 ; That means, the shuffle must have legal type and legal mask.
11 ; Before, the DAGCombiner forgot to check if the resulting shuffle
|
| avx-unpack.ll | 6 %shuffle.i = shufflevector <8 x float> %src1, <8 x float> %src2, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15>
7 ret <8 x float> %shuffle.i
13 %shuffle.i = shufflevector <4 x double> %src1, <4 x double> %src2, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
14 ret <4 x double> %shuffle.i
20 %shuffle.i = shufflevector <8 x float> %src1, <8 x float> %src2, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13>
21 ret <8 x float> %shuffle.i
27 %shuffle.i = shufflevector <4 x double> %src1, <4 x double> %src2, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
28 ret <4 x double> %shuffle.i
34 %shuffle.i = shufflevector <8 x float> %src1, <8 x float> %src2, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
35 ret <8 x float> %shuffle.
[all...] |
| commuted-blend-mask.ll | 5 ; Before, when commuting the operands to the shuffle in function @test, the backend
11 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 6, i32 3>
12 ret <4 x i32> %shuffle
|
| vector-shuffle-sse1.ll | 11 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
12 ret <4 x float> %shuffle
19 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
20 ret <4 x float> %shuffle
27 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
28 ret <4 x float> %shuffle
35 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
36 ret <4 x float> %shuffle
43 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
44 ret <4 x float> %shuffle
[all...] |
| avx-cast.ll | 20 %shuffle.i = shufflevector <4 x float> %m, <4 x float> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4>
21 ret <8 x float> %shuffle.i
36 %shuffle.i = shufflevector <2 x double> %m, <2 x double> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
37 ret <4 x double> %shuffle.i
54 %shuffle.i = shufflevector <2 x i64> %m, <2 x i64> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
55 ret <4 x i64> %shuffle.i
71 %shuffle.i = shufflevector <8 x float> %m, <8 x float> %m, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
72 ret <4 x float> %shuffle.i
85 %shuffle.i = shufflevector <4 x i64> %m, <4 x i64> %m, <2 x i32> <i32 0, i32 1>
86 ret <2 x i64> %shuffle.
[all...] |
| vector-shuffle-512-v8.ll | 17 %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
18 ret <8 x double> %shuffle
33 %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0>
34 ret <8 x double> %shuffle
49 %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 0, i32 0>
50 ret <8 x double> %shuffle
65 %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 0>
66 ret <8 x double> %shuffle
81 %shuffle = shufflevector <8 x double> %a, <8 x double> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 4, i32 0, i32 0, i32 0, i32 0>
82 ret <8 x double> %shuffle
[all...] |
| avx-isa-check.ll | 219 %shuffle = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11>
220 ret <8 x i16> %shuffle
224 %shuffle = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 23, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 31, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14>
225 ret <16 x i16> %shuffle
229 %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 31, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14>
230 ret <16 x i8> %shuffle
234 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 undef, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 63, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
235 ret <32 x i8> %shuffle
239 %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2>
240 ret <2 x i64> %shuffle
[all...] |
| vector-shuffle-256-v8.ll | 18 %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
19 ret <8 x float> %shuffle
35 %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0>
36 ret <8 x float> %shuffle
52 %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 2, i32 0, i32 0>
53 ret <8 x float> %shuffle
69 %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 3, i32 0, i32 0, i32 0>
70 ret <8 x float> %shuffle
87 %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 4, i32 0, i32 0, i32 0, i32 0>
88 ret <8 x float> %shuffle
[all...] |
| avx-vperm2x128.ll | 11 %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
12 ret <8 x float> %shuffle
21 %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>
22 ret <8 x float> %shuffle
31 %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
32 ret <8 x float> %shuffle
41 %shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>
42 ret <8 x float> %shuffle
51 %shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
52 ret <32 x i8> %shuffle
[all...] |
| /external/llvm/test/TableGen/ |
| usevalname.td | 18 multiclass shuffle<Reg RC> {
24 defm ADD : shuffle<VR128>;
|
| /external/llvm/test/CodeGen/ARM/ |
| combine-vmovdrr.ll | 5 declare <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8> %shuffle.i.i307, <8 x i8> %shuffle.i27.i308, <8 x i8> %vtbl2.i25.i)
18 %shuffle.i.bc.i309 = load <2 x i64>, <2 x i64>* %addr
20 %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 0
21 %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
22 %tmp45 = bitcast i64 %shuffle.i.extract.i310 to <8 x i8>
23 %tmp46 = bitcast i64 %shuffle.i27.extract.i311 to <8 x i8>
34 %shuffle.i.bc.i309 = load <2 x i64>, <2 x i64>* %add
[all...] |
| shuffle.ll | 9 %shuffle = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 3, i32 1, i32 2, i32 0, i32 4, i32 4, i32 5, i32 0>
10 ret <8 x i8> %shuffle
16 %shuffle = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 3, i32 1, i32 2, i32 0, i32 4, i32 4, i32 5, i32 8>
17 ret <8 x i8> %shuffle
|
| 2012-01-24-RegSequenceLiveRange.ll | 46 %shuffle.i39.i.i1035 = shufflevector <2 x i64> undef, <2 x i64> undef, <1 x i32> zeroinitializer
47 %shuffle.i38.i.i1036 = shufflevector <2 x i64> zeroinitializer, <2 x i64> undef, <1 x i32> zeroinitializer
48 %shuffle.i37.i.i1037 = shufflevector <1 x i64> %shuffle.i39.i.i1035, <1 x i64> %shuffle.i38.i.i1036, <2 x i32> <i32 0, i32 1>
49 %0 = bitcast <2 x i64> %shuffle.i37.i.i1037 to <4 x float>
51 %shuffle.i36.i.i = shufflevector <2 x i64> %1, <2 x i64> undef, <1 x i32> zeroinitializer
52 %shuffle.i35.i.i = shufflevector <2 x i64> undef, <2 x i64> undef, <1 x i32> zeroinitializer
53 %shuffle.i34.i.i = shufflevector <1 x i64> %shuffle.i36.i.i, <1 x i64> %shuffle.i35.i.i, <2 x i32> <i32 0, i32 1
[all...] |
| /external/llvm/test/Analysis/CostModel/ARM/ |
| shuffle.ll | 5 ; CHECK: shuffle
6 define void @shuffle() {
13 ; CHECK: cost of 1 {{.*}} shuffle
15 ; CHECK: cost of 1 {{.*}} shuffle
17 ; CHECK: cost of 1 {{.*}} shuffle
19 ; CHECK: cost of 2 {{.*}} shuffle
22 ; CHECK: cost of 1 {{.*}} shuffle
24 ; CHECK: cost of 1 {{.*}} shuffle
26 ; CHECK: cost of 2 {{.*}} shuffle
29 ; CHECK: cost of 1 {{.*}} shuffle
[all...] |
| /external/llvm/include/llvm/IR/ |
| UseListOrder.h | 32 std::vector<unsigned> Shuffle;
35 : V(V), F(F), Shuffle(ShuffleSize) {}
39 : V(X.V), F(X.F), Shuffle(std::move(X.Shuffle)) {}
43 Shuffle = std::move(X.Shuffle);
|
| /external/webp/src/dsp/ |
| lossless_enc_neon.c | 40 const uint8x16_t shuffle) {
41 return vcombine_u8(vtbl1q_u8(argb, vget_low_u8(shuffle)),
42 vtbl1q_u8(argb, vget_high_u8(shuffle)));
49 const uint8x8_t shuffle) {
50 return vcombine_u8(vtbl1_u8(vget_low_u8(argb), shuffle),
51 vtbl1_u8(vget_high_u8(argb), shuffle));
58 const uint8x16_t shuffle = vld1q_u8(kGreenShuffle); local
60 const uint8x8_t shuffle = vld1_u8(kGreenShuffle); local
64 const uint8x16_t greens = DoGreenShuffle(argb, shuffle);
95 const uint8x16_t shuffle = vld1q_u8(kg0g0) local
98 const uint8x8_t shuffle = vld1_u8(k0g0g); local
[all...] |
| /external/llvm/lib/Target/X86/Utils/ |
| X86ShuffleDecode.h | 1 //===-- X86ShuffleDecode.h - X86 shuffle decode logic -----------*-C++-*---===//
10 // Define several functions to decode x86 specific shuffle semantics into a
60 /// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates
65 /// DecodeUNPCKHMask - This decodes the shuffle masks for unpckhps/unpckhpd
70 /// DecodeUNPCKLMask - This decodes the shuffle masks for unpcklps/unpcklpd
83 /// \brief Decode a BLEND immediate mask into a shuffle mask.
89 /// \brief Decode a shuffle packed values at 128-bit granularity
90 /// immediate mask into a shuffle mask.
94 /// DecodeVPERMMask - this decodes the shuffle masks for VPERMQ/VPERMPD.
101 /// \brief Decode a zero extension instruction as a shuffle mask
[all...] |
