/toolchain/binutils/binutils-2.25/gas/testsuite/gas/score/ |
shift_32.d | 10 0: 5800 slli! r0, 0 11 2: 581f slli! r0, 31 12 4: 59e0 slli! r15, 0 13 6: 59ff slli! r15, 31 14 8: 5800 slli! r0, 0 15 a: 5800 slli! r0, 0 16 c: 5800 slli! r0, 0 17 e: 5800 slli! r0, 0 18 10: 5800 slli! r0, 0 19 12: 5800 slli! r0, [all...] |
shift_32.s | 24 /* slli/srli rD,rA,Imm5 -> slli!/srli! rD,Imm5 */ 25 _shift_op_pattern "slli", "slli.c"
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rD_rA_BN.d | 52 60: 6011 slli! r0, 2 53 62: 6011 slli! r0, 2 54 64: 6f21 slli! r15, 4 55 66: 6f21 slli! r15, 4 56 68: 6f09 slli! r15, 1 57 6a: 6f09 slli! r15, 1 58 6c: 6f19 slli! r15, 3 59 6e: 6f19 slli! r15, 3 60 70: 6819 slli! r8, 3 61 72: 6819 slli! r8, [all...] |
rD_rA_BN.s | 6 * slli.c <-> slli! : register number must be in 0-15 65 tran3216 "slli.c", "slli!" 71 tran1632 "slli.c", "slli!"
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/m32r/ |
m32r2.s | 83 .global slli 84 slli: label 85 slli r0,#1 || slli r2,#31 86 mul r0,r1 || slli r2,#31 87 slli r0,#1 || mul r2,r3 88 ldi r0,#1 || slli r2,#31 89 slli r0,#1 || ldi r2,#1
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m32r2.d | 59 0+0060 <slli>: 60 60: 50 41 d2 5f slli r0,#0x1 \|\| slli r2,#0x1f 61 64: 52 5f 90 61 slli r2,#0x1f \|\| mul r0,r1 62 68: 50 41 92 63 slli r0,#0x1 \|\| mul r2,r3 63 6c: 60 01 d2 5f ldi r0,#1 \|\| slli r2,#0x1f 64 70: 50 41 e2 01 slli r0,#0x1 \|\| ldi r2,#1
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allinsn.s | 391 .global slli 392 slli: label 393 slli fp,0
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m32rx.s | 279 slli fp, #22 || machi r2, fp 280 slli fp, #22
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/nios2/ |
rotate.s | 9 slli r4,r4,24
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rotate.d | 13 0+0010 <[^>]*> 2008963a slli r4,r4,24
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/d10v/ |
immediate-001.s | 17 slli r0,0xf 18 slli a1,0xf
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instruction_packing-005.s | 29 slli r2,1
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immediate-001.d | 15 18: 91 0f c2 0d slli r0, 0xf <- rachi r0, a0, -0x2 16 1c: 92 0f b3 1f srai r0, 0xf <- slli a1, 0xf
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instruction_packing-005.d | 18 18: 01 31 a2 43 addi r3, 0x1 || slli r2, 0x1
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/dlx/ |
itype.s | 9 1: slli s0,s1,1b
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itype.d | 20 1c: da 30 00 1c slli r16,r17,0x001c
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/external/llvm/test/MC/Mips/msa/ |
test_bit.s | 31 # CHECK: slli.b $w23, $w10, 1 # encoding: [0x78,0x71,0x55,0xc9] 32 # CHECK: slli.h $w9, $w18, 1 # encoding: [0x78,0x61,0x92,0x49] 33 # CHECK: slli.w $w11, $w29, 4 # encoding: [0x78,0x44,0xea,0xc9] 34 # CHECK: slli.d $w25, $w20, 1 # encoding: [0x78,0x01,0xa6,0x49] 80 slli.b $w23, $w10, 1 81 slli.h $w9, $w18, 1 82 slli.w $w11, $w29, 4 83 slli.d $w25, $w20, 1
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/nds32/ |
to-16bit-v1.s | 16 slli $r0, $r0, 0 17 slli $r7, $r7, 7
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alu-1.s | 14 slli $r0, $r1, 1
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alu-1.d | 22 0+0030 <[^>]*> slli \$r0, \$r1, #1
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/external/llvm/test/MC/Disassembler/Mips/msa/ |
test_bit.txt | 31 0x78 0x71 0x55 0xc9 # CHECK: slli.b $w23, $w10, 1 32 0x78 0x61 0x92 0x49 # CHECK: slli.h $w9, $w18, 1 33 0x78 0x44 0xea 0xc9 # CHECK: slli.w $w11, $w29, 4 34 0x78 0x01 0xa6 0x49 # CHECK: slli.d $w25, $w20, 1
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/external/llvm/test/CodeGen/Mips/msa/ |
bit.ll | 164 %1 = tail call <16 x i8> @llvm.mips.slli.b(<16 x i8> %0, i32 7) 169 declare <16 x i8> @llvm.mips.slli.b(<16 x i8>, i32) nounwind 173 ; CHECK: slli.b 183 %1 = tail call <8 x i16> @llvm.mips.slli.h(<8 x i16> %0, i32 7) 188 declare <8 x i16> @llvm.mips.slli.h(<8 x i16>, i32) nounwind 192 ; CHECK: slli.h 202 %1 = tail call <4 x i32> @llvm.mips.slli.w(<4 x i32> %0, i32 7) 207 declare <4 x i32> @llvm.mips.slli.w(<4 x i32>, i32) nounwind 211 ; CHECK: slli.w 221 %1 = tail call <2 x i64> @llvm.mips.slli.d(<2 x i64> %0, i32 7 [all...] |
/external/llvm/test/CodeGen/BPF/ |
sanity.ll | 19 ; CHECK: slli r2, 56 40 ; CHECK: slli r2, 56
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/or1k/ |
allinsn.s | 237 l.slli r0,r0,0 238 l.slli r31,r31,63 239 l.slli r16,r16,32 240 l.slli r15,r15,31 241 l.slli r1,r1,1 242 l.slli r11,r14,49 243 l.slli r7,r27,23 244 l.slli r30,r16,11
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/external/llvm/test/CodeGen/Mips/Fast-ISel/ |
shftopm.ll | 33 define void @slli() { 38 ; CHECK-LABEL: slli:
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