/toolchain/binutils/binutils-2.25/gas/testsuite/gas/d10v/ |
address-014.s | 6 st2w r0,@+r2
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address-021.s | 6 st2w r0,@-r2
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address-029.s | 6 st2w r0,@sp-
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address-036.s | 6 st2w r0,@+sp
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address-014.l | 3 .*:6: Error: could not assemble: st2w r0
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address-021.l | 3 .*:6: Error: could not assemble: st2w r0
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address-036.l | 3 .*:6: Error: could not assemble: st2w r0
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address-001.s | 18 st2w r0,@r2 26 st2w r0,@r2+ 34 st2w r0,@r2- 45 st2w r0,@sp 53 st2w r0,@sp+ 65 st2w r0,@-sp 76 st2w r0,@(0x8000,r2)
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address-001.d | 13 c: 75 02 60 05 st2w r0, @r2 -> ld r0, @r2\+ 15 14: 75 02 e4 05 st2w r0, @r2\+ -> ld r0, @r2- 17 1c: 77 02 f0 1e st2w r0, @r2- -> ldb r0, @sp 20 28: 74 0f 6a 1e st r0, @sp -> st2w r0, @sp 22 30: 74 0f ea 1f st r0, @sp\+ -> st2w r0, @sp\+ 24 38: 76 0f ee 1f st r0, @-sp -> st2w r0, @-sp 31 54: f5 02 80 00 st2w r0, @\(-0x8000, r2\)
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inst.s | 15 st2w r0, @0x0800
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inst.d | 15 14: f7 01 08 00 st2w r0, @0x800
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/d30v/ |
warn_oddreg.s | 2 # of multi-word instructions: ld2w, ld4bh, ld4bhu, ld2h, st2w, st4hb, st2h, 5 st2w r1, @(r0, 0) || nop label
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opt.s | 104 # parallel even though st2w uses r5 and adds modifies it 105 st2w r4,@(r0,r6) 109 st2w r4,@(r0,r6) 112 # parallel even though st2w uses r6 and adds changes it 113 st2w r4,@(r0,r6) 117 st2w r4,@(r0,r6) 121 st2w r4,@(r0,r6) 127 st2w r10,@(r3,r4) 128 st2w r40,@(r43,r44) 181 st2w r2, @(r2, r3 [all...] |
opt.d | 41 f8: 05604006 086054d4 st2w.s r4, @\(r0, r6\) || adds.s r5, r19, r20 42 100: 05604006 08603154 st2w.s r4, @\(r0, r6\) || adds.s r3, r5, r20 43 108: 05604006 086064d4 st2w.s r4, @\(r0, r6\) || adds.s r6, r19, r20 44 110: 05604006 086074d4 st2w.s r4, @\(r0, r6\) || adds.s r7, r19, r20 45 118: 05604006 08607014 st2w.s r4, @\(r0, r6\) || adds.s r7, r0, r20 46 120: 0560a0c4 85628aec st2w.s r10, @\(r3, r4\) -> st2w.s r40, @\(r43, r44\) 62 190: 05602083 89004146 st2w.s r2, @\(r2, r3\) -> addhlll.s r4, r5, r6
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warn_oddreg.l | 14 2 # of multi-word instructions: ld2w, ld4bh, ld4bhu, ld2h, st2w, st4hb, st2h, 17 5 0000 05681000 st2w r1, @(r0, 0) || nop
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inst.s | 400 st2w r6,@(r7,r8) 401 st2w r6,@(r7+,r8) 402 st2w r6,@(r7-,r8) 403 st2w r6,@(r7,0x1a) 404 st2w r6,@(r7,0x1234)
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inst.d | 215 668: 056061c8 856461c8 st2w.s r6, @\(r7, r8\) -> st2w.s r6, @\(r7\+, r8\) 216 670: 056c61c8 856861da st2w.s r6, @\(r7-, r8\) -> st2w.s r6, @\(r7, 0x1a\) 217 678: 856861c0 80001234 st2w.l r6, @\(r7, 0x1234\)
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/toolchain/binutils/binutils-2.25/include/opcode/ |
d30v.h | 85 #define SHORT_M2 5 /* for ld2w and st2w */ 121 #define LONG_M2 62 /* Memory long for ld2w, st2w */
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/toolchain/binutils/binutils-2.25/opcodes/ |
d10v-opc.c | 323 { "st2w", LONG_L, 1, MU, SEQ, 0x35000000, 0x3f100000, { RSRC2E, ATPAR, NUM16, RSRC } }, 324 { "st2w", SHORT_2, 1, MU, PAR|WMEM, 0x6a00, 0x7e21, { RSRC2E, ATSIGN, RSRC } }, 325 { "st2w", SHORT_2, 1, MU, PAR|WMEM, 0x6e1f, 0x7e3f, { RSRC2E, ATMINUS, RSRC_SP } }, 326 { "st2w", SHORT_2, 1, MU, PAR|WMEM, 0x6a01, 0x7e21, { RSRC2E, ATSIGN, RSRC, PLUS } }, 327 { "st2w", SHORT_2, 1, MU, PAR|WMEM, 0x6e01, 0x7e21, { RSRC2E, ATSIGN, RSRC_NOSP, MINUS } }, 328 { "st2w", LONG_L, 1, MU, SEQ, 0x37010000, 0x3f1f0000, { RSRC2E, ATSIGN, NUM16 } },
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d30v-opc.c | 317 { "st2w", IMEM, 0x16, { SHORT_M2, LONG_M2 }, MU, 0, FLAG_MEM | FLAG_NOT_WITH_ADDSUBppp, 0 },
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ChangeLog-0001 | 47 (d10v_opcodes): Use RSRC_NOSP in post-decrement "st" and "st2w". 54 (d10v_opcodes): Adjust "st" and "st2w" to use RSRC_SP. [all...] |
ChangeLog-9899 | 85 slae, st and st2w. [all...] |
/toolchain/binutils/binutils-2.25/gas/config/ |
tc-d30v.c | 856 registers, for example st2w. */ [all...] |
/toolchain/binutils/binutils-2.25/gas/ |
ChangeLog-9697 | [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/ |
ChangeLog-9303 | [all...] |