| /external/llvm/test/CodeGen/X86/ |
| 2009-06-15-not-a-tail-call.ll | 9 %tmp6 = tail call fastcc i8* @_D3gcx2GC12mallocNoSyncMFmkZPv() ; <i8*> [#uses=2]
10 %tmp9 = tail call i8* @memset(i8* %tmp6, i32 0, i64 2) ; <i8*> [#uses=0]
11 ret i8* %tmp6
|
| isnan2.ll | 7 %tmp6 = fcmp uno double %X, 0.000000e+00 ; <i1> [#uses=1]
8 %tmp67 = zext i1 %tmp6 to i32 ; <i32> [#uses=1]
|
| vec_set-2.ll | 7 %tmp6 = insertelement <4 x float> %tmp5, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
8 %tmp7 = insertelement <4 x float> %tmp6, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
14 %tmp6 = insertelement <4 x i32> %tmp, i32 0, i32 1 ; <<8 x i32>> [#uses=1]
15 %tmp8 = insertelement <4 x i32> %tmp6, i32 0, i32 2 ; <<8 x i32>> [#uses=1]
|
| 2008-03-10-RegAllocInfLoop.ll | 8 %tmp6 = load i8, i8* null, align 1 ; <i8> [#uses=1]
11 %tmp26 = call fastcc i8* @w_addchar( i8* null, i32* %word_length, i32* %max_length, i8 signext %tmp6 ) nounwind ; <i8*> [#uses=1]
|
| 2011-07-13-BadFrameIndexDisplacement.ll | 12 %tmp6 = add i64 %a, -2147483647
13 %.sum = add i64 %tmp6, %b
|
| avx1-logical-load-folding.ll | 13 %tmp6 = extractelement <8 x float> %tmp5, i32 0
14 store float %tmp6, float* %C
27 %tmp6 = extractelement <8 x float> %tmp5, i32 0
28 store float %tmp6, float* %C
41 %tmp6 = extractelement <8 x float> %tmp5, i32 0
42 store float %tmp6, float* %C
54 %tmp6 = bitcast <8 x i32> %tmp5 to <8 x float>
55 %tmp7 = extractelement <8 x float> %tmp6, i32 0
|
| /external/llvm/test/CodeGen/PowerPC/ |
| ppcf128-4.ll | 5 %tmp6 = fmul ppc_fp128 0xM00000000000000000000000000000000, 0xM41F00000000000000000000000000000
8 %tmp11 = fadd ppc_fp128 %tmp789, %tmp6
|
| 2006-01-20-ShiftPartsCrash.ll | 10 %tmp6.u = add i32 %tmp5, 32 ; <i32> [#uses=1]
11 %tmp6 = bitcast i32 %tmp6.u to i32 ; <i32> [#uses=1]
13 %tmp6.upgrd.1 = trunc i32 %tmp6 to i8 ; <i8> [#uses=1]
14 %shift.upgrd.2 = zext i8 %tmp6.upgrd.1 to i64 ; <i64> [#uses=1]
|
| 2006-07-07-ComputeMaskedBits.ll | 13 %tmp6 = getelementptr i32, i32* %tmp3, i32 %tmp5 ; <i32*> [#uses=1]
14 %tmp7 = load i32, i32* %tmp6 ; <i32> [#uses=1]
|
| /external/llvm/test/Transforms/InstCombine/ |
| 2007-03-21-SignedRangeTest.ll | 3 define i1 @test(i32 %tmp6) {
4 %tmp7 = sdiv i32 %tmp6, 12 ; <i32> [#uses=1]
|
| apint-and-xor-merge.ll | 10 %tmp6 = and i57 %z, %y
11 %tmp7 = xor i57 %tmp3, %tmp6
18 %tmp6 = or i23 %y, %x
19 %tmp7 = xor i23 %tmp3, %tmp6
|
| and-or-not.ll | 13 %tmp6 = and i32 %b, %a ; <i32> [#uses=1]
14 %tmp7 = or i32 %tmp6, %tmp3not ; <i32> [#uses=1]
22 %tmp6 = and i32 %b, %a ; <i32> [#uses=1]
23 %tmp6not = xor i32 %tmp6, -1 ; <i32> [#uses=1]
32 %tmp6 = and <4 x i32> %a, %b ; <<4 x i32>> [#uses=1]
33 %tmp7 = or <4 x i32> %tmp6, %tmp3not ; <<4 x i32>> [#uses=1]
41 %tmp6 = and <4 x i32> %a, %b ; <<4 x i32>> [#uses=1]
42 %tmp6not = xor <4 x i32> %tmp6, < i32 -1, i32 -1, i32 -1, i32 -1 > ; <<4 x i32>> [#uses=1]
|
| and-xor-merge.ll | 10 %tmp6 = and i32 %z, %y
11 %tmp7 = xor i32 %tmp3, %tmp6
21 %tmp6 = or i32 %y, %x
22 %tmp7 = xor i32 %tmp3, %tmp6
|
| onehot_merge.ll | 12 %tmp6 = icmp eq i32 %tmp5, 0
13 %or = or i1 %tmp2, %tmp6
31 %tmp6 = icmp eq i32 %tmp5, 0
32 %or = or i1 %tmp2, %tmp6
|
| /external/llvm/test/Analysis/ScalarEvolution/ |
| 2007-08-06-MisinterpretBranch.ll | 12 %x_addr.0 = phi i32 [ %tmp6, %bb ], [ %x, %entry ] ; <i32> [#uses=1]
13 %tmp6 = add i32 %x_addr.0, 1 ; <i32> [#uses=3]
14 %tmp9 = icmp slt i32 %tmp6, %y ; <i1> [#uses=1]
18 %x_addr.1 = phi i32 [ %x, %entry ], [ %tmp6, %bb ] ; <i32> [#uses=1]
|
| /external/webrtc/webrtc/common_audio/signal_processing/ |
| complex_fft_mips.c | 35 int32_t tmp6 = 0; local
75 "lh %[tmp6], 0(%[ptr_i]) \n\t"
87 "sll %[tmp6], %[tmp6], 14 \n\t"
91 "subu %[tmp4], %[tmp6], %[tmp1] \n\t"
92 "addu %[tmp1], %[tmp6], %[tmp1] \n\t"
93 "addu %[tmp6], %[tmp5], %[tmp2] \n\t"
96 "shra_r.w %[tmp6], %[tmp6], 15 \n\t"
104 "sll %[tmp6], %[tmp6], 14 \n\t
157 int32_t tmp5 = 0, tmp6 = 0, tmp = 0, tempMax = 0, round2 = 0; local
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| dyn-stackalloc.ll | 22 %tmp6 = load i32, i32* null
23 %tmp8 = alloca float, i32 %tmp6
50 %tmp6 = alloca i8, i32 %tmp5
51 %tmp9 = call i8* @strcpy(i8* %tmp6, i8* %tag)
52 %tmp6.len = call i32 @strlen(i8* %tmp6)
53 %tmp6.indexed = getelementptr i8, i8* %tmp6, i32 %tmp6.len
54 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp6.indexed, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @str215, i32 0, i32 0), i32 2, i32 1, i1 (…)
[all...] |
| uxtb.ll | 23 %tmp6 = and i32 %tmp1, 16711935 ; <i32> [#uses=1]
24 ret i32 %tmp6
38 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
39 ret i32 %tmp6
47 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
48 ret i32 %tmp6
55 %tmp6 = or i32 %tmp2, %tmp5 ; <i32> [#uses=1]
56 ret i32 %tmp6
63 %tmp6 = or i32 %tmp5, %tmp1 ; <i32> [#uses=1]
64 ret i32 %tmp6
[all...] |
| /external/llvm/test/Transforms/IndVarSimplify/ |
| loop_evaluate_4.ll | 10 %i.03.0 = phi i32 [ 0, %entry ], [ %tmp6, %bb7 ] ; <i32> [#uses=2]
13 %tmp6 = add i32 %i.03.0, 1 ; <i32> [#uses=2]
14 icmp slt i32 %tmp6, 100 ; <i1>:0 [#uses=1]
|
| /external/llvm/test/CodeGen/Thumb/ |
| 2011-EpilogueBug.ll | 9 %tmp6 = load i32, i32* null
10 %tmp8 = alloca float, i32 %tmp6
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm11_asm/ |
| h264bsd_interpolate_chroma_hor.s | 65 tmp6 RN 12 label
97 ADD tmp6, x0, chrPW ;// tmp6 = x0+ chromaPartWidth
98 ADD tmp6, tmp6, #1 ;// tmp6 = x0 + chromaPartWidth + 1
99 CMP tmp6, width ;// x0+chromaPartWidth+1 > width
106 ADD tmp6, y0, chrPH ;// tmp6 = y0 + chromaPartHeight
107 CMP tmp6, heigh
[all...] |
| h264bsd_interpolate_chroma_hor_ver.s | 63 tmp6 RN 11 label
195 LDRB tmp6, [ptrA, width, LSL #1]
198 PKHBT tmp4, tmp4, tmp6, LSL #16 ;// |t6|t4|
205 MLA tmp6, tmp3, valX, c32 ;// t3=t3*valX+32
206 MLA tmp6, tmp4, xFrac, tmp6 ;// t6=t4*xFrac+t6
208 MOV tmp6, tmp6, LSR #6 ;// scale down
209 STRB tmp6, [mb, #8] ;// store pixel
226 MLA tmp6, tmp3, xFrac, c32 ;// t3=t3*xFrac+3
[all...] |
| /external/llvm/test/Analysis/MemoryDependenceAnalysis/ |
| memdep_requires_dominator_tree.ll | 14 %tmp6 = load i32, i32* %arrayidx5, align 4
15 store i32 %tmp6, i32* %arrayidx, align 4
|
| /external/llvm/test/CodeGen/NVPTX/ |
| vector-select.ll | 10 %tmp6 = load <2 x i32>, <2 x i32> addrspace(1)* %def_c
13 %cond = select <2 x i1> %0, <2 x i32> %tmp6, <2 x i32> %tmp8
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-bcc.ll | 15 %tmp6 = and i32 %tmp5, %c
16 ret i32 %tmp6
|
