| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| any-idiv.s | 4 udiv r0, r1, r2
|
| arm-idiv.s | 4 udiv r5, r9, r8 label
6 udiv r9, r5, r7 label
|
| armv7-a+idiv.s | 7 udiv r0, r1, r2
13 udiv r0, r1, r2
|
| arm-idiv.d | 7 0+000 <[^>]*> e735f819 udiv r5, r9, r8
8 0+004 <[^>]*> e739f715 udiv r9, r5, r7
|
| armv7-a+idiv.d | 7 0[0-9a-f]+ <[^>]+> e730f211 udiv r0, r1, r2
9 0[0-9a-f]+ <[^>]+> fbb1 f0f2 udiv r0, r1, r2
|
| /external/llvm/test/MC/ARM/ |
| directive-arch_extension-toggle.s | 6 udiv r0, r1, r2
8 udiv r0, r1, r2
|
| directive-arch_extension-mode-switch.s | 11 udiv r0, r0, r1
15 udiv r0, r0, r1
|
| invalid-idiv.s | 11 udiv r3, r4, r5
15 @ ARM-A15: udiv r3, r4, r5
19 @ THUMB-A15: udiv r3, r4, r5
24 @ ARM: udiv r3, r4, r5
28 @ THUMB: udiv r3, r4, r5
|
| idiv.s | 14 udiv r3, r4, r5
16 @ A15-ARM: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7]
18 @ A15-THUMB: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3]
21 @ A15-ARM-NOTHUMBHWDIV: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7]
23 @ A15-THUMB-NOARMHWDIV: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3]
26 @ ARMV8: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7]
28 @ THUMBV8: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3]
31 @ ARMV8-NOTHUMBHWDIV: udiv r3, r4, r5 @ encoding: [0x14,0xf5,0x33,0xe7]
33 @ THUMBV8-NOTHUMBHWDIV: udiv r3, r4, r5 @ encoding: [0xb4,0xfb,0xf5,0xf3]
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| lds-oqap-crash.ll | 17 ; so we'll use udiv instructions.
18 %div0 = udiv i32 %0, %b
19 %div1 = udiv i32 %div0, %a
20 %div2 = udiv i32 %div1, 11
21 %div3 = udiv i32 %div2, %a
22 %div4 = udiv i32 %div3, %b
23 %div5 = udiv i32 %div4, %c
24 %div6 = udiv i32 %div5, %div0
25 %div7 = udiv i32 %div6, %div1
|
| structurize.ll | 68 ; so we'll use udiv instructions.
69 %div0 = udiv i32 %a, %b
70 %div1 = udiv i32 %div0, %4
71 %div2 = udiv i32 %div1, 11
72 %div3 = udiv i32 %div2, %a
73 %div4 = udiv i32 %div3, %b
74 %div5 = udiv i32 %div4, %c
75 %div6 = udiv i32 %div5, %div0
76 %div7 = udiv i32 %div6, %div1
|
| /external/llvm/test/CodeGen/SPARC/ |
| multiple-div.ll | 7 ;; because the spec says to treat %y as potentially-written by udiv.
11 ; CHECK: udiv
13 ; CHECK: udiv
17 %r = udiv i32 %a, %b
18 %r2 = udiv i32 %b, %a
|
| /external/llvm/test/Transforms/InstCombine/ |
| 2008-11-27-UDivNegative.ll | 4 %A = udiv i8 %x, 250
|
| udiv-simplify-bug-1.ll | 2 ; RUN: grep udiv %t1.ll | count 2
6 ; The udiv instructions shouldn't be optimized away, and the
11 %r = udiv i32 %y, %g
17 %r = udiv i32 %y, %v
|
| udiv_select_to_select_shift.ll | 2 ; udiv X, (Select Cond, C1, C2) --> Select Cond, (shr X, C1), (shr X, C2)
7 ; RUN: not grep udiv %t
12 %quotient1 = udiv i64 %X, %divisor1
14 %quotient2 = udiv i64 %X, %divisor2
|
| apint-div1.ll | 8 %Y = udiv i33 %X, 4096
14 %Y = udiv i49 %X, %tmp.0
20 %R = udiv i59 %X, %V
|
| apint-div2.ll | 8 %Y = udiv i333 %X, 70368744177664
14 %Y = udiv i499 %X, %tmp.0
20 %R = udiv i599 %X, %V
|
| 2012-08-28-udiv_ashl.ll | 9 ; CHECK: udiv i32 %x, 400
14 %div1 = udiv i32 %div, 100
26 %div1 = udiv i32 %div, 100
31 ; CHECK: udiv i32 %x, 400
37 ; unsigned inputs), turn this into a udiv.
45 ; CHECK: udiv i80 %x, 400
49 %div1 = udiv i80 %div, 100
55 %div1 = udiv i32 %div, 100
|
| udiv-simplify-bug-0.ll | 5 %r = udiv i32 %y, -1
11 %r = udiv i32 %y, 3
|
| 2007-06-21-DivCompareMiscomp.ll | 5 %tmp470 = udiv i32 %tmp468, 4 ; <i32> [#uses=2]
|
| urem.ll | 4 %r = udiv i64 %x1, %y2
|
| div-shift.ll | 17 ; CHECK-NOT: udiv
21 %3 = udiv i64 %x, %2
28 ; CHECK-NOT: udiv
35 %3 = udiv i64 %x, %2
41 ; CHECK-NOT: udiv
49 %4 = udiv i32 %x, %3
55 ; CHECK-NOT: udiv
63 %4 = udiv i32 %V, %3
70 ; CHECK-NOT: udiv i32 %z, %x
73 %y = udiv i32 %z, %diviso
[all...] |
| /external/llvm/test/Transforms/LICM/ |
| preheader-safe.ll | 9 ; CHECK: %div = udiv i64 %x, %y
16 %div = udiv i64 %x, %y
24 ; CHECK: %div = udiv i64 %x, %y
30 %div = udiv i64 %x, %y
40 ; CHECK: %div = udiv i64 %x, %y
46 %div = udiv i64 %x, %y
59 ; CHECK: %div = udiv i64 %x, %y
66 %div = udiv i64 %x, %y
|
| /external/llvm/test/tools/llvm-objdump/ARM/ |
| macho-mcpu-arm.test | 7 udiv r1, r2, r3
10 @ CHECK: b2 fb f3 f1 udiv r1, r2, r3
|
| /external/llvm/test/CodeGen/X86/ |
| x86_64-mul-by-const.ll | 7 %tmp1 = udiv i32 %A, 1577682821 ; <i32> [#uses=1]
|
