| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/rx/ |
| and.sm | 1 and #{uimm4},{reg}
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| cmp.sm | 1 cmp #{uimm4},{reg}
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| mul.sm | 1 mul #{uimm4},{reg}
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| or.sm | 1 or #{uimm4},{reg}
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| sub.sm | 1 sub #{uimm4},{reg}
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| add.sm | 1 add #{uimm4},{reg}
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| mov.sm | 3 mov.L #{uimm4},{reg}
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| macros.inc | 19 macro uimm4 {0;15}
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/ |
| event2.s | 23 //RAISE uimm4 ; /* (a) */
28 //EXCPT uimm4 ; /* (a) */
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| shift2.s | 81 //Dreg_lo_hi = Dreg_lo_hi >>> uimm4 ; /* arithmetic right shift (b) */
109 //Dreg_lo_hi = Dreg_lo_hi << uimm4 (S) ; /* arithmetic left shift (b) */
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| vector2.s | 447 //Dreg = Dreg >>> uimm4 (V) ; /* arithmetic shift right, immediate (b) */
460 //Dreg = Dreg << uimm4 (V,S) ; /* arithmetic shift left, immediate with saturation (b) */
496 //Dreg = Dreg >> uimm4 (V) ; /* logical shift right, immediate (b) */
506 //Dreg = Dreg << uimm4 (V) ; /* logical shift left, immediate (b) */
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/ |
| tbit_test.s | 5 # tbit uimm4, reg
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| programmer-friendly.s | 20 // CCMN Xn, Xm, #uimm4, cond
21 // As a convenience, GAS accepts a string representation for #uimm4,
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| /toolchain/binutils/binutils-2.25/opcodes/ |
| cr16-opc.c | 291 {"excp", 1, 0x00C, 20, NO_TYPE_INS, {{uimm4,16}}},
339 CSTBIT_INST_W ("cbitw", uimm4, 0x69, 0x00114, 0x36, 0x1AB),
340 CSTBIT_INST_W ("sbitw", uimm4, 0x71, 0x00118, 0x3A, 0x1CB),
341 CSTBIT_INST_W ("tbitw", uimm4, 0x79, 0x0011C, 0x3E, 0x1EB),
344 {"tbit", 1, 0x06, 24, CSTBIT_INS, {{uimm4,20}, {regr,16}}},
411 {NAME, 2, OPC1, 24, LD_STOR_INS, {{uimm4,20},{abs20,0}}}, \
413 {NAME, 3, OPC2+3, 12, LD_STOR_INS, {{uimm4,4},{abs24,16}}}, \
415 {NAME, 2, OPC3, 25, LD_STOR_INS, {{uimm4,20}, {rindex8_abs20,0}}}, \
417 {NAME, 2, OPC4, 22, LD_STOR_INS, {{uimm4,4},{rpindex_disps14,0}}}, \
419 {NAME, 1, OPC1+1, 24, LD_STOR_INS, {{uimm4,20}, {rpbase_disps0,16}}},
[all...] |
| xc16x-opc.c | [all...] |
| aarch64-opc-2.c | 80 {AARCH64_OPND_CLASS_IMMEDIATE, "UIMM4", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_CRm}, "a 4-bit unsigned immediate"},
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| xc16x-desc.c | 681 { XC16X_F_UIMM4, "f-uimm4", 0, 32, 15, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
791 /* uimm4: 4 bit unsigned number */
792 { "uimm4", XC16X_OPERAND_UIMM4, HW_H_UINT, 15, 4,
[all...] |
| m32r-desc.c | 274 { M32R_F_UIMM4, "f-uimm4", 0, 32, 12, 4, { 0, { { { (1<<MACH_BASE), 0 } } } } },
353 /* uimm4: 4 bit trap number */
354 { "uimm4", M32R_OPERAND_UIMM4, HW_H_UINT, 12, 4,
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MicroMipsDSPInstrInfo.td | 207 "shll.ph", null_frag, immZExt4, NoItinerary, DSPROpnd, uimm4>,
210 "shll_s.ph", int_mips_shll_s_ph, immZExt4, NoItinerary, DSPROpnd, uimm4>,
223 "shra.ph", null_frag, immZExt4, NoItinerary, DSPROpnd, uimm4>;
225 "shra_r.ph", int_mips_shra_r_ph, immZExt4, NoItinerary, DSPROpnd, uimm4>;
231 "shrl.ph", null_frag, immZExt4, NoItinerary, DSPROpnd, uimm4>;
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| MipsSEISelDAGToDAG.h | 92 /// \brief Select constant vector splats whose value fits in a uimm4.
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| MipsISelDAGToDAG.h | 95 /// \brief Select constant vector splats whose value fits in a uimm4.
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| MipsDSPInstrInfo.td | 682 NoItinerary, DSPROpnd, uimm4>,
691 uimm4>,
699 NoItinerary, DSPROpnd, uimm4>;
706 uimm4>;
[all...] |
| /toolchain/binutils/binutils-2.25/cpu/ |
| xc16x.cpu | 155 (dnf f-uimm4 "uimm4" () 15 4) ;used for immediate data,eg in MOV insns
552 (dnop uimm4 "4 bit unsigned number" (HASH-PREFIX) h-uint f-uimm4)
576 (dnop u4 "gap of 4 bits" () h-r0 f-uimm4)
[all...] |
| mep-core.cpu | 765 (dnop uimm4 "bCC const (4 bits)" (all-mep-core-isas) h-uint f-4u8)
[all...] |
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| cr16.h | 124 uimm3, uimm3_1, uimm4, uimm4_1, uimm5, uimm16, uimm20, uimm32, enumerator in enum:__anon74577
|
