/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
inval-16.s | 4 vaddsd %xmm4, %xmm5, %xmm6{%k7}
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inval-16.l | 15 [ ]*4[ ]+vaddsd %xmm4, %xmm5, %xmm6\{%k7\}
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avx-scalar.s | 37 vaddsd %xmm4,%xmm6,%xmm2 38 vaddsd (%ecx),%xmm6,%xmm2 314 vaddsd xmm2,xmm6,xmm4 315 vaddsd xmm2,xmm6,QWORD PTR [ecx] 316 vaddsd xmm2,xmm6,[ecx]
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x86-64-avx-scalar.s | 53 vaddsd %xmm4,%xmm6,%xmm2 54 vaddsd (%rcx),%xmm6,%xmm2 375 vaddsd xmm2,xmm6,xmm4 376 vaddsd xmm2,xmm6,QWORD PTR [rcx] 377 vaddsd xmm2,xmm6,[rcx]
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evex-lig.s | 7 vaddsd %xmm4, %xmm5, %xmm6{%k7} # AVX512 8 vaddsd %xmm4, %xmm5, %xmm6{%k7}{z} # AVX512 9 vaddsd {rn-sae}, %xmm4, %xmm5, %xmm6{%k7} # AVX512 10 vaddsd {ru-sae}, %xmm4, %xmm5, %xmm6{%k7} # AVX512 11 vaddsd {rd-sae}, %xmm4, %xmm5, %xmm6{%k7} # AVX512 12 vaddsd {rz-sae}, %xmm4, %xmm5, %xmm6{%k7} # AVX512 13 vaddsd (%ecx), %xmm5, %xmm6{%k7} # AVX512 14 vaddsd -123456(%esp,%esi,8), %xmm5, %xmm6{%k7} # AVX512 15 vaddsd 1016(%edx), %xmm5, %xmm6{%k7} # AVX512 Disp8 16 vaddsd 1024(%edx), %xmm5, %xmm6{%k7} # AVX51 [all...] |
x86-64-evex-lig.s | 7 vaddsd %xmm28, %xmm29, %xmm30{%k7} # AVX512 8 vaddsd %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512 9 vaddsd {rn-sae}, %xmm28, %xmm29, %xmm30{%k7} # AVX512 10 vaddsd {ru-sae}, %xmm28, %xmm29, %xmm30{%k7} # AVX512 11 vaddsd {rd-sae}, %xmm28, %xmm29, %xmm30{%k7} # AVX512 12 vaddsd {rz-sae}, %xmm28, %xmm29, %xmm30{%k7} # AVX512 13 vaddsd (%rcx), %xmm29, %xmm30{%k7} # AVX512 14 vaddsd 0x123(%rax,%r14,8), %xmm29, %xmm30{%k7} # AVX512 15 vaddsd 1016(%rdx), %xmm29, %xmm30{%k7} # AVX512 Disp8 16 vaddsd 1024(%rdx), %xmm29, %xmm30{%k7} # AVX51 [all...] |
avx-scalar-intel.d | 28 [ ]*[a-f0-9]+: c5 cf 58 d4 vaddsd xmm2,xmm6,xmm4 29 [ ]*[a-f0-9]+: c5 cf 58 11 vaddsd xmm2,xmm6,QWORD PTR \[ecx\] 265 [ ]*[a-f0-9]+: c5 cf 58 d4 vaddsd xmm2,xmm6,xmm4 266 [ ]*[a-f0-9]+: c5 cf 58 11 vaddsd xmm2,xmm6,QWORD PTR \[ecx\] 267 [ ]*[a-f0-9]+: c5 cf 58 11 vaddsd xmm2,xmm6,QWORD PTR \[ecx\] [all...] |
evex-lig256-intel.d | 12 [ ]*[a-f0-9]+: 62 f1 d7 2f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4 13 [ ]*[a-f0-9]+: 62 f1 d7 af 58 f4 vaddsd xmm6\{k7\}\{z\},xmm5,xmm4 14 [ ]*[a-f0-9]+: 62 f1 d7 1f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4,\{rn-sae\} 15 [ ]*[a-f0-9]+: 62 f1 d7 5f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4,\{ru-sae\} 16 [ ]*[a-f0-9]+: 62 f1 d7 3f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4,\{rd-sae\} 17 [ ]*[a-f0-9]+: 62 f1 d7 7f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4,\{rz-sae\} 18 [ ]*[a-f0-9]+: 62 f1 d7 2f 58 31 vaddsd xmm6\{k7\},xmm5,QWORD PTR \[ecx\] 19 [ ]*[a-f0-9]+: 62 f1 d7 2f 58 b4 f4 c0 1d fe ff vaddsd xmm6\{k7\},xmm5,QWORD PTR \[esp\+esi\*8-0x1e240\] 20 [ ]*[a-f0-9]+: 62 f1 d7 2f 58 72 7f vaddsd xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x3f8\] 21 [ ]*[a-f0-9]+: 62 f1 d7 2f 58 b2 00 04 00 00 vaddsd xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x400\ [all...] |
evex-lig256.d | 12 [ ]*[a-f0-9]+: 62 f1 d7 2f 58 f4 vaddsd %xmm4,%xmm5,%xmm6\{%k7\} 13 [ ]*[a-f0-9]+: 62 f1 d7 af 58 f4 vaddsd %xmm4,%xmm5,%xmm6\{%k7\}\{z\} 14 [ ]*[a-f0-9]+: 62 f1 d7 1f 58 f4 vaddsd \{rn-sae\},%xmm4,%xmm5,%xmm6\{%k7\} 15 [ ]*[a-f0-9]+: 62 f1 d7 5f 58 f4 vaddsd \{ru-sae\},%xmm4,%xmm5,%xmm6\{%k7\} 16 [ ]*[a-f0-9]+: 62 f1 d7 3f 58 f4 vaddsd \{rd-sae\},%xmm4,%xmm5,%xmm6\{%k7\} 17 [ ]*[a-f0-9]+: 62 f1 d7 7f 58 f4 vaddsd \{rz-sae\},%xmm4,%xmm5,%xmm6\{%k7\} 18 [ ]*[a-f0-9]+: 62 f1 d7 2f 58 31 vaddsd \(%ecx\),%xmm5,%xmm6\{%k7\} 19 [ ]*[a-f0-9]+: 62 f1 d7 2f 58 b4 f4 c0 1d fe ff vaddsd -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} 20 [ ]*[a-f0-9]+: 62 f1 d7 2f 58 72 7f vaddsd 0x3f8\(%edx\),%xmm5,%xmm6\{%k7\} 21 [ ]*[a-f0-9]+: 62 f1 d7 2f 58 b2 00 04 00 00 vaddsd 0x400\(%edx\),%xmm5,%xmm6\{%k7\ [all...] |
evex-lig512-intel.d | 12 [ ]*[a-f0-9]+: 62 f1 d7 4f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4 13 [ ]*[a-f0-9]+: 62 f1 d7 cf 58 f4 vaddsd xmm6\{k7\}\{z\},xmm5,xmm4 14 [ ]*[a-f0-9]+: 62 f1 d7 1f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4,\{rn-sae\} 15 [ ]*[a-f0-9]+: 62 f1 d7 5f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4,\{ru-sae\} 16 [ ]*[a-f0-9]+: 62 f1 d7 3f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4,\{rd-sae\} 17 [ ]*[a-f0-9]+: 62 f1 d7 7f 58 f4 vaddsd xmm6\{k7\},xmm5,xmm4,\{rz-sae\} 18 [ ]*[a-f0-9]+: 62 f1 d7 4f 58 31 vaddsd xmm6\{k7\},xmm5,QWORD PTR \[ecx\] 19 [ ]*[a-f0-9]+: 62 f1 d7 4f 58 b4 f4 c0 1d fe ff vaddsd xmm6\{k7\},xmm5,QWORD PTR \[esp\+esi\*8-0x1e240\] 20 [ ]*[a-f0-9]+: 62 f1 d7 4f 58 72 7f vaddsd xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x3f8\] 21 [ ]*[a-f0-9]+: 62 f1 d7 4f 58 b2 00 04 00 00 vaddsd xmm6\{k7\},xmm5,QWORD PTR \[edx\+0x400\ [all...] |
evex-lig512.d | 12 [ ]*[a-f0-9]+: 62 f1 d7 4f 58 f4 vaddsd %xmm4,%xmm5,%xmm6\{%k7\} 13 [ ]*[a-f0-9]+: 62 f1 d7 cf 58 f4 vaddsd %xmm4,%xmm5,%xmm6\{%k7\}\{z\} 14 [ ]*[a-f0-9]+: 62 f1 d7 1f 58 f4 vaddsd \{rn-sae\},%xmm4,%xmm5,%xmm6\{%k7\} 15 [ ]*[a-f0-9]+: 62 f1 d7 5f 58 f4 vaddsd \{ru-sae\},%xmm4,%xmm5,%xmm6\{%k7\} 16 [ ]*[a-f0-9]+: 62 f1 d7 3f 58 f4 vaddsd \{rd-sae\},%xmm4,%xmm5,%xmm6\{%k7\} 17 [ ]*[a-f0-9]+: 62 f1 d7 7f 58 f4 vaddsd \{rz-sae\},%xmm4,%xmm5,%xmm6\{%k7\} 18 [ ]*[a-f0-9]+: 62 f1 d7 4f 58 31 vaddsd \(%ecx\),%xmm5,%xmm6\{%k7\} 19 [ ]*[a-f0-9]+: 62 f1 d7 4f 58 b4 f4 c0 1d fe ff vaddsd -0x1e240\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\} 20 [ ]*[a-f0-9]+: 62 f1 d7 4f 58 72 7f vaddsd 0x3f8\(%edx\),%xmm5,%xmm6\{%k7\} 21 [ ]*[a-f0-9]+: 62 f1 d7 4f 58 b2 00 04 00 00 vaddsd 0x400\(%edx\),%xmm5,%xmm6\{%k7\ [all...] |
x86-64-evex-lig256-intel.d | 12 [ ]*[a-f0-9]+: 62 01 97 27 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28 13 [ ]*[a-f0-9]+: 62 01 97 a7 58 f4 vaddsd xmm30\{k7\}\{z\},xmm29,xmm28 14 [ ]*[a-f0-9]+: 62 01 97 17 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{rn-sae\} 15 [ ]*[a-f0-9]+: 62 01 97 57 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{ru-sae\} 16 [ ]*[a-f0-9]+: 62 01 97 37 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{rd-sae\} 17 [ ]*[a-f0-9]+: 62 01 97 77 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{rz-sae\} 18 [ ]*[a-f0-9]+: 62 61 97 27 58 31 vaddsd xmm30\{k7\},xmm29,QWORD PTR \[rcx\] 19 [ ]*[a-f0-9]+: 62 21 97 27 58 b4 f0 23 01 00 00 vaddsd xmm30\{k7\},xmm29,QWORD PTR \[rax\+r14\*8\+0x123\] 20 [ ]*[a-f0-9]+: 62 61 97 27 58 72 7f vaddsd xmm30\{k7\},xmm29,QWORD PTR \[rdx\+0x3f8\] 21 [ ]*[a-f0-9]+: 62 61 97 27 58 b2 00 04 00 00 vaddsd xmm30\{k7\},xmm29,QWORD PTR \[rdx\+0x400\ [all...] |
x86-64-evex-lig256.d | 12 [ ]*[a-f0-9]+: 62 01 97 27 58 f4 vaddsd %xmm28,%xmm29,%xmm30\{%k7\} 13 [ ]*[a-f0-9]+: 62 01 97 a7 58 f4 vaddsd %xmm28,%xmm29,%xmm30\{%k7\}\{z\} 14 [ ]*[a-f0-9]+: 62 01 97 17 58 f4 vaddsd \{rn-sae\},%xmm28,%xmm29,%xmm30\{%k7\} 15 [ ]*[a-f0-9]+: 62 01 97 57 58 f4 vaddsd \{ru-sae\},%xmm28,%xmm29,%xmm30\{%k7\} 16 [ ]*[a-f0-9]+: 62 01 97 37 58 f4 vaddsd \{rd-sae\},%xmm28,%xmm29,%xmm30\{%k7\} 17 [ ]*[a-f0-9]+: 62 01 97 77 58 f4 vaddsd \{rz-sae\},%xmm28,%xmm29,%xmm30\{%k7\} 18 [ ]*[a-f0-9]+: 62 61 97 27 58 31 vaddsd \(%rcx\),%xmm29,%xmm30\{%k7\} 19 [ ]*[a-f0-9]+: 62 21 97 27 58 b4 f0 23 01 00 00 vaddsd 0x123\(%rax,%r14,8\),%xmm29,%xmm30\{%k7\} 20 [ ]*[a-f0-9]+: 62 61 97 27 58 72 7f vaddsd 0x3f8\(%rdx\),%xmm29,%xmm30\{%k7\} 21 [ ]*[a-f0-9]+: 62 61 97 27 58 b2 00 04 00 00 vaddsd 0x400\(%rdx\),%xmm29,%xmm30\{%k7\ [all...] |
x86-64-evex-lig512-intel.d | 12 [ ]*[a-f0-9]+: 62 01 97 47 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28 13 [ ]*[a-f0-9]+: 62 01 97 c7 58 f4 vaddsd xmm30\{k7\}\{z\},xmm29,xmm28 14 [ ]*[a-f0-9]+: 62 01 97 17 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{rn-sae\} 15 [ ]*[a-f0-9]+: 62 01 97 57 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{ru-sae\} 16 [ ]*[a-f0-9]+: 62 01 97 37 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{rd-sae\} 17 [ ]*[a-f0-9]+: 62 01 97 77 58 f4 vaddsd xmm30\{k7\},xmm29,xmm28,\{rz-sae\} 18 [ ]*[a-f0-9]+: 62 61 97 47 58 31 vaddsd xmm30\{k7\},xmm29,QWORD PTR \[rcx\] 19 [ ]*[a-f0-9]+: 62 21 97 47 58 b4 f0 23 01 00 00 vaddsd xmm30\{k7\},xmm29,QWORD PTR \[rax\+r14\*8\+0x123\] 20 [ ]*[a-f0-9]+: 62 61 97 47 58 72 7f vaddsd xmm30\{k7\},xmm29,QWORD PTR \[rdx\+0x3f8\] 21 [ ]*[a-f0-9]+: 62 61 97 47 58 b2 00 04 00 00 vaddsd xmm30\{k7\},xmm29,QWORD PTR \[rdx\+0x400\ [all...] |
x86-64-evex-lig512.d | 12 [ ]*[a-f0-9]+: 62 01 97 47 58 f4 vaddsd %xmm28,%xmm29,%xmm30\{%k7\} 13 [ ]*[a-f0-9]+: 62 01 97 c7 58 f4 vaddsd %xmm28,%xmm29,%xmm30\{%k7\}\{z\} 14 [ ]*[a-f0-9]+: 62 01 97 17 58 f4 vaddsd \{rn-sae\},%xmm28,%xmm29,%xmm30\{%k7\} 15 [ ]*[a-f0-9]+: 62 01 97 57 58 f4 vaddsd \{ru-sae\},%xmm28,%xmm29,%xmm30\{%k7\} 16 [ ]*[a-f0-9]+: 62 01 97 37 58 f4 vaddsd \{rd-sae\},%xmm28,%xmm29,%xmm30\{%k7\} 17 [ ]*[a-f0-9]+: 62 01 97 77 58 f4 vaddsd \{rz-sae\},%xmm28,%xmm29,%xmm30\{%k7\} 18 [ ]*[a-f0-9]+: 62 61 97 47 58 31 vaddsd \(%rcx\),%xmm29,%xmm30\{%k7\} 19 [ ]*[a-f0-9]+: 62 21 97 47 58 b4 f0 23 01 00 00 vaddsd 0x123\(%rax,%r14,8\),%xmm29,%xmm30\{%k7\} 20 [ ]*[a-f0-9]+: 62 61 97 47 58 72 7f vaddsd 0x3f8\(%rdx\),%xmm29,%xmm30\{%k7\} 21 [ ]*[a-f0-9]+: 62 61 97 47 58 b2 00 04 00 00 vaddsd 0x400\(%rdx\),%xmm29,%xmm30\{%k7\ [all...] |
avx-scalar.d | 27 [ ]*[a-f0-9]+: c5 cf 58 d4 vaddsd %xmm4,%xmm6,%xmm2 28 [ ]*[a-f0-9]+: c5 cf 58 11 vaddsd \(%ecx\),%xmm6,%xmm2 264 [ ]*[a-f0-9]+: c5 cf 58 d4 vaddsd %xmm4,%xmm6,%xmm2 265 [ ]*[a-f0-9]+: c5 cf 58 11 vaddsd \(%ecx\),%xmm6,%xmm2 266 [ ]*[a-f0-9]+: c5 cf 58 11 vaddsd \(%ecx\),%xmm6,%xmm2 [all...] |
x86-64-avx-scalar-intel.d | 40 [ ]*[a-f0-9]+: c5 cf 58 d4 vaddsd xmm2,xmm6,xmm4 41 [ ]*[a-f0-9]+: c5 cf 58 11 vaddsd xmm2,xmm6,QWORD PTR \[rcx\] 314 [ ]*[a-f0-9]+: c5 cf 58 d4 vaddsd xmm2,xmm6,xmm4 315 [ ]*[a-f0-9]+: c5 cf 58 11 vaddsd xmm2,xmm6,QWORD PTR \[rcx\] 316 [ ]*[a-f0-9]+: c5 cf 58 11 vaddsd xmm2,xmm6,QWORD PTR \[rcx\] [all...] |
/external/llvm/test/CodeGen/X86/ |
pr23103.ll | 14 ; CHECK-NEXT: vaddsd {{.*}}(%rsp), %xmm0, %xmm0 {{.*#+}} 8-byte Folded Reload
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avx512-scalar.ll | 25 ; AVX512: vaddsd %xmm{{.*}} ## encoding: [0x62 27 ; AVX: vaddsd %xmm{{.*}} ## encoding: [0xc5
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machine-combiner.ll | 182 ; AVX-NEXT: vaddsd %xmm3, %xmm2, %xmm1 183 ; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm0 636 ; AVX: vaddsd 16(%rsp), %xmm1, %xmm1 637 ; AVX-NEXT: vaddsd (%rsp), %xmm0, %xmm0 638 ; AVX-NEXT: vaddsd %xmm0, %xmm1, %xmm0 660 ; AVX: vaddsd 16(%rsp), %xmm1, %xmm1 661 ; AVX-NEXT: vaddsd (%rsp), %xmm0, %xmm0 662 ; AVX-NEXT: vaddsd %xmm0, %xmm1, %xmm0
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fold-load-binops.ll | 34 ; AVX-NEXT: vaddsd (%rdi), %xmm0, %xmm0
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sse-scalar-fp-arith.ll | 112 ; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm0 272 ; AVX-NEXT: vaddsd %xmm0, %xmm1, %xmm0 500 ; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm0 635 ; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm0 760 ; AVX-NEXT: vaddsd %xmm0, %xmm1, %xmm0 883 ; AVX-NEXT: vaddsd %xmm1, %xmm0, %xmm0 1008 ; AVX-NEXT: vaddsd %xmm0, %xmm1, %xmm0
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/external/llvm/test/MC/Disassembler/X86/ |
avx-512.txt | 83 # CHECK: vaddsd 256(%rdx), %xmm0, %xmm16
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/external/v8/test/cctest/ |
test-disasm-ia32.cc | 504 __ vaddsd(xmm0, xmm1, xmm2); 505 __ vaddsd(xmm0, xmm1, Operand(ebx, ecx, times_4, 10000));
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test-disasm-x64.cc | 531 __ vaddsd(xmm0, xmm1, xmm2); 532 __ vaddsd(xmm0, xmm1, Operand(rbx, rcx, times_4, 10000));
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