| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.cpp | 27 if (Opcode == ARM::VMOVRS || Opcode == ARM::VMOVRRD)
|
| MLxExpansionPass.cpp | 192 if (Opcode == ARM::VMOVRS || Opcode == ARM::VMOVRRD)
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| ARMISelLowering.cpp | [all...] |
| ARMISelLowering.h | 75 VMOVRRD, // double to two gprs.
|
| ARMInstrVFP.td | 849 def VMOVRRD : AVConv3I<0b11000101, 0b1011,
[all...] |
| ARMISelDAGToDAG.cpp | 450 if (Opcode == ARM::VMOVRS || Opcode == ARM::VMOVRRD)
[all...] |
| ARMBaseInstrInfo.cpp | [all...] |
| ARMFastISel.cpp | [all...] |
| /art/compiler/optimizing/ |
| intrinsics_arm.cc | 88 __ vmovrrd(output.AsRegisterPairLow<Register>(),
[all...] |
| code_generator_arm.cc | [all...] |
| /art/compiler/utils/arm/ |
| assembler_arm32.h | 158 void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) OVERRIDE;
|
| assembler_thumb2.h | 203 void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) OVERRIDE;
[all...] |
| assembler_arm.h | 624 virtual void vmovrrd(Register rt, Register rt2, DRegister dm, Condition cond = AL) = 0;
[all...] |
| assembler_arm32.cc | 1014 void Arm32Assembler::vmovrrd(Register rt, Register rt2, DRegister dm, function in class:art::arm::Arm32Assembler
[all...] |
| assembler_thumb2.cc | 2923 void Thumb2Assembler::vmovrrd(Register rt, Register rt2, DRegister dm, function in class:art::arm::Thumb2Assembler
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| vector-DAGCombine.ll | 38 ; Radar 8407927: Make sure that VMOVRRD gets optimized away when the result is
|
| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 312 /// rX, rY VMOVRRD dZ
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| /external/llvm/include/llvm/CodeGen/ |
| MachineInstr.h | 540 /// rX, rY VMOVRRD dZ
[all...] |
