| /external/llvm/test/CodeGen/ARM/ |
| peephole-bitcast.ll | 8 ; Peephole leaves a dead vmovsr instruction behind, and depends on linear scan
|
| /art/compiler/utils/arm/ |
| assembler_arm32.h | 153 void vmovsr(SRegister sn, Register rt, Condition cond = AL) OVERRIDE;
|
| assembler_arm.h | 619 virtual void vmovsr(SRegister sn, Register rt, Condition cond = AL) = 0;
749 vmovsr(sd, IP, cond);
[all...] |
| assembler_thumb2.h | 198 void vmovsr(SRegister sn, Register rt, Condition cond = AL) OVERRIDE;
[all...] |
| assembler_arm32.cc | 921 void Arm32Assembler::vmovsr(SRegister sn, Register rt, Condition cond) { function in class:art::arm::Arm32Assembler
[all...] |
| assembler_thumb2.cc | 2830 void Thumb2Assembler::vmovsr(SRegister sn, Register rt, Condition cond) { function in class:art::arm::Thumb2Assembler
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMInstrVFP.td | 826 def VMOVSR : AVConv4I<0b11100000, 0b1010,
[all...] |
| ARMBaseInstrInfo.cpp | 724 Opc = ARM::VMOVSR;
[all...] |
| ARMScheduleSwift.td | 626 (instregex "VMOVSR$", "VSETLN")>;
[all...] |
| ARMFastISel.cpp | 448 TII.get(ARM::VMOVSR), MoveReg)
[all...] |
| ARMInstrInfo.td | 312 // Cortex-A9 prefers VMOVSR to VMOVDRR even when using NEON for scalar FP, as
[all...] |
| /art/compiler/optimizing/ |
| code_generator_arm.cc | [all...] |
| intrinsics_arm.cc | 104 __ vmovsr(output.AsFpuRegister<SRegister>(), input.AsRegister<Register>());
[all...] |
