| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| armv8-a+simd.s | 31 vrintn.f32 d16, d16
37 vrintn.f32 q8, q8
69 vrintn.f32 d16, d16
75 vrintn.f32 q8, q8
|
| armv8-a+fp.s | 43 vrintn.f32 s1, s1
50 vrintn.f64 d1, d1
99 vrintn.f32 s1, s1
106 vrintn.f64 d1, d1
|
| armv8-a+simd.d | 33 0[0-9a-f]+ <[^>]+> f3fa0420 vrintn.f32 d16, d16
39 0[0-9a-f]+ <[^>]+> f3fa0460 vrintn.f32 q8, q8
69 0[0-9a-f]+ <[^>]+> fffa 0420 vrintn.f32 d16, d16
75 0[0-9a-f]+ <[^>]+> fffa 0460 vrintn.f32 q8, q8
|
| armv8-a+fp.d | 44 0[0-9a-f]+ <[^>]+> fef90a60 vrintn.f32 s1, s1
51 0[0-9a-f]+ <[^>]+> feb91b41 vrintn.f64 d1, d1
98 0[0-9a-f]+ <[^>]+> fef9 0a60 vrintn.f32 s1, s1
105 0[0-9a-f]+ <[^>]+> feb9 1b41 vrintn.f64 d1, d1
|
| /external/llvm/test/MC/ARM/ |
| neon-v8.s | 48 vrintn.f32 d3, d0
49 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0x00,0x34,0xba,0xf3]
50 vrintn.f32 q1, q4
51 @ CHECK: vrintn.f32 q1, q4 @ encoding: [0x48,0x24,0xba,0xf3]
74 vrintn.f32.f32 d3, d0
75 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0x00,0x34,0xba,0xf3]
|
| thumb-neon-v8.s | 48 vrintn.f32 d3, d0
49 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x34]
50 vrintn.f32 q1, q4
51 @ CHECK: vrintn.f32 q1, q4 @ encoding: [0xba,0xff,0x48,0x24]
74 vrintn.f32.f32 d3, d0
75 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x34]
|
| directive-arch_extension-fp.s | 123 vrintn.f32 s0, s0
125 vrintn.f64 d0, d0
127 vrintn.f32.f32 s0, s0
129 vrintn.f64.f64 d0, d0
259 vrintn.f32 s0, s0
261 vrintn.f64 d0, d0
263 vrintn.f32.f32 s0, s0
265 vrintn.f64.f64 d0, d0
|
| directive-arch_extension-simd.s | 95 vrintn.f32 s0, s0
97 vrintn.f64 d0, d0
99 vrintn.f32.f32 s0, s0
101 vrintn.f64.f64 d0, d0
203 vrintn.f32 s0, s0
205 vrintn.f64 d0, d0
207 vrintn.f32.f32 s0, s0
209 vrintn.f64.f64 d0, d0
|
| fp-armv8.s | 113 vrintn.f64 d3, d4
114 @ CHECK: vrintn.f64 d3, d4 @ encoding: [0x44,0x3b,0xb9,0xfe]
115 vrintn.f32 s12, s1
116 @ CHECK: vrintn.f32 s12, s1 @ encoding: [0x60,0x6a,0xb9,0xfe]
|
| thumb-fp-armv8.s | 119 vrintn.f64 d3, d4
120 @ CHECK: vrintn.f64 d3, d4 @ encoding: [0xb9,0xfe,0x44,0x3b]
121 vrintn.f32 s12, s1
122 @ CHECK: vrintn.f32 s12, s1 @ encoding: [0xb9,0xfe,0x60,0x6a]
|
| invalid-fp-armv8.s | 84 vrintn.f32.f32 d3, d0
|
| invalid-neon-v8.s | 21 vrintn.f32 d3, q12
|
| fullfp16-neon-neg.s | 271 vrintn.f16.f16 d0, d1
272 vrintn.f16.f16 q0, q1
|
| fullfp16-neon.s | 378 vrintn.f16.f16 d0, d1
379 vrintn.f16.f16 q0, q1
380 @ ARM: vrintn.f16 d0, d1 @ encoding: [0x01,0x04,0xb6,0xf3]
381 @ ARM: vrintn.f16 q0, q1 @ encoding: [0x42,0x04,0xb6,0xf3]
382 @ THUMB: vrintn.f16 d0, d1 @ encoding: [0xb6,0xff,0x01,0x04]
383 @ THUMB: vrintn.f16 q0, q1 @ encoding: [0xb6,0xff,0x42,0x04]
|
| single-precision-fp.s | 156 vrintn.f64 d7, d6
168 @ CHECK-ERRORS-NEXT: vrintn.f64 d7, d6
|
| /external/clang/test/CodeGen/ |
| arm-neon-directed-rounding.c | 31 // CHECK: call <2 x float> @llvm.arm.neon.vrintn.v2f32(<2 x float> %a)
37 // CHECK: call <4 x float> @llvm.arm.neon.vrintn.v4f32(<4 x float> %a)
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| neon-v8.txt | 49 # CHECK: vrintn.f32 d3, d0
51 # CHECK: vrintn.f32 q1, q4
|
| thumb-neon-v8.txt | 49 # CHECK: vrintn.f32 d3, d0
51 # CHECK: vrintn.f32 q1, q4
|
| fp-armv8.txt | 140 # CHECK: vrintn.f64 d3, d4
143 # CHECK: vrintn.f32 s12, s1
|
| thumb-fp-armv8.txt | 148 # CHECK: vrintn.f64 d3, d4
151 # CHECK: vrintn.f32 s12, s1
|
| fullfp16-neon-arm.txt | 248 # CHECK: vrintn.f16 d0, d1
249 # CHECK: vrintn.f16 q0, q1
|
| fullfp16-neon-thumb.txt | 248 # CHECK: vrintn.f16 d0, d1
249 # CHECK: vrintn.f16 q0, q1
|
| /external/v8/test/cctest/ |
| test-disasm-arm.cc | 768 COMPARE(vrintn(d0, d0), "feb90b40 vrintn.f64.f64 d0, d0");
769 COMPARE(vrintn(d2, d3), "feb92b43 vrintn.f64.f64 d2, d3");
[all...] |
| test-assembler-arm.cc | [all...] |
| /external/v8/src/arm/ |
| disasm-arm.cc | [all...] |
