/external/llvm/lib/Target/ARM/ |
ARMLoadStoreOptimizer.cpp | 285 case ARM::VSTRD: 411 case ARM::VSTRD: 897 assert(isi32Store(Opcode) || Opcode == ARM::VSTRS || Opcode == ARM::VSTRD); [all...] |
ARMBaseRegisterInfo.cpp | 497 case ARM::VSTRS: case ARM::VSTRD:
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ARMScheduleSwift.td | 665 def : InstRW<[SwiftWriteLM4Cy], (instregex "VSTRD$", "VSTRS$")>; [all...] |
ARMInstrVFP.td | 103 def VSTRD : ADI5<0b1101, 0b00, (outs), (ins DPR:$Dd, addrmode5:$addr), [all...] |
ARMBaseInstrInfo.cpp | 875 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTRD)) [all...] |
ARMFrameLowering.cpp | [all...] |
ARMFastISel.cpp | [all...] |
/art/compiler/utils/arm/ |
assembler_arm32.h | 169 void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
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assembler_arm32.cc | 1075 void Arm32Assembler::vstrd(DRegister dd, const Address& ad, Condition cond) { function in class:art::arm::Arm32Assembler [all...] |
assembler_thumb2.h | 214 void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE; [all...] |
assembler_arm.h | 635 virtual void vstrd(DRegister dd, const Address& ad, Condition cond = AL) = 0; [all...] |
assembler_thumb2.cc | 2984 void Thumb2Assembler::vstrd(DRegister dd, const Address& ad, Condition cond) { function in class:art::arm::Thumb2Assembler [all...] |