Lines Matching defs:in
5 * you may not use this file except in compliance with the License.
10 * Unless required by applicable law or agreed to in writing, software
73 // Live registers will be restored in the catch block if caught.
97 // Live registers will be restored in the catch block if caught.
165 // Live registers will be restored in the catch block if caught.
430 << "Unexpected instruction in read barrier marking slow path: "
480 // In that case, we have lost the information about the original
495 << "Unexpected instruction in read barrier for heap reference slow path: "
508 // Compute the actual memory offset and store it in `index`.
539 // The initial register stored in `index_` has already been
540 // saved in the call to art::SlowPathCode::SaveLiveRegisters
544 // Shifting the index value contained in `index_reg` by the scale
545 // factor (2) cannot overflow in practice, as the runtime is
647 << "Unexpected instruction in read barrier for GC root slow path: "
718 // "Meaning (floating-point)" column in the table A8-1 of the ARMv7 reference manual.
803 // Adjust native pc offsets in stack maps.
880 // but in the range.
1529 // MaybeRecordNativeDebugInfo is already called implicitly in CodeGenerator::Compile.
1539 // Handle the long/FP comparisons made in instruction simplification.
1893 // However this is not required in practice, as this is an
1897 // concurrent copying collector may not in the future).
1944 Location in = locations->InAt(0);
1947 DCHECK(in.IsRegister());
1948 __ rsb(out.AsRegister<Register>(), in.AsRegister<Register>(), ShifterOperand(0));
1952 DCHECK(in.IsRegisterPair());
1953 // out.lo = 0 - in.lo (and update the carry/borrow (C) flag)
1955 in.AsRegisterPairLow<Register>(),
1958 // instruction here, as it does not exist in the Thumb-2
1966 // out.hi = out.hi - in.hi
1969 ShifterOperand(in.AsRegisterPairHigh<Register>()));
1973 DCHECK(in.IsFpuRegister());
1974 __ vnegs(out.AsFpuRegister<SRegister>(), in.AsFpuRegister<SRegister>());
1978 DCHECK(in.IsFpuRegisterPair());
1980 FromLowSToD(in.AsFpuRegisterPairLow<SRegister>()));
2210 Location in = locations->InAt(0);
2219 __ sbfx(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>(), 0, 8);
2227 __ sbfx(out.AsRegister<Register>(), in.AsRegister<Register>(), 0, 8);
2240 __ sbfx(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>(), 0, 16);
2248 __ sbfx(out.AsRegister<Register>(), in.AsRegister<Register>(), 0, 16);
2262 if (in.IsRegisterPair()) {
2263 __ Mov(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>());
2264 } else if (in.IsDoubleStackSlot()) {
2265 __ LoadFromOffset(kLoadWord, out.AsRegister<Register>(), SP, in.GetStackIndex());
2267 DCHECK(in.IsConstant());
2268 DCHECK(in.GetConstant()->IsLongConstant());
2269 int64_t value = in.GetConstant()->AsLongConstant()->GetValue();
2277 __ vmovs(temp, in.AsFpuRegister<SRegister>());
2287 __ vmovd(temp_d, FromLowSToD(in.AsFpuRegisterPairLow<SRegister>()));
2309 DCHECK(in.IsRegister());
2310 __ Mov(out.AsRegisterPairLow<Register>(), in.AsRegister<Register>());
2345 __ ubfx(out.AsRegister<Register>(), in.AsRegisterPairLow<Register>(), 0, 16);
2353 __ ubfx(out.AsRegister<Register>(), in.AsRegister<Register>(), 0, 16);
2371 __ vmovsr(out.AsFpuRegister<SRegister>(), in.AsRegister<Register>());
2388 FromLowSToD(in.AsFpuRegisterPairLow<SRegister>()));
2406 __ vmovsr(out.AsFpuRegisterPairLow<SRegister>(), in.AsRegister<Register>());
2414 Register low = in.AsRegisterPairLow<Register>();
2415 Register high = in.AsRegisterPairHigh<Register>();
2439 in.AsFpuRegister<SRegister>());
2945 // Most remainders are implemented in the runtime.
2994 // The runtime helper puts the output in R2,R3.
3130 Register in = locations->InAt(0).AsRegister<Register>();
3136 // so map all rotations to a +ve. equivalent in that range.
3137 // (e.g. left *or* right by -2 bits == 30 bits in the same direction.)
3142 __ Ror(out, in, rot);
3143 } else if (out != in) {
3144 __ Mov(out, in);
3147 __ Ror(out, in, rhs.AsRegister<Register>());
3154 // rotations as sub-word sized rotations in the other direction) as appropriate.
3166 // For rotates over a word in size, 'pre-rotate' by 32-bits to keep rotate
3573 Location in = locations->InAt(0);
3576 __ mvn(out.AsRegister<Register>(), ShifterOperand(in.AsRegister<Register>()));
3581 ShifterOperand(in.AsRegisterPairLow<Register>()));
3583 ShifterOperand(in.AsRegisterPairHigh<Register>()));
3601 Location in = locations->InAt(0);
3602 __ eor(out.AsRegister<Register>(), in.AsRegister<Register>(), ShifterOperand(1));
3759 // We need a load followed by store. (The address used in a STREX instruction must
3760 // be the same as the address in the most recently executed LDREX instruction.)
3846 // Note that in the case where `value` is a null reference,
3906 // Longs and doubles are handled in the switch.
3938 // The output overlaps in case of volatile long: we don't want the
3940 // object's location. Likewise, in the case of an object field get
3963 // path in CodeGeneratorARM::GenerateFieldLoadWithBakerReadBarrier.
4047 // Note that a potential implicit null check is handled in this
4103 // Potential implicit null checks, in the case of reference or
4104 // double fields, are handled in the previous switch statement.
4111 // Memory barriers, in the case of references, are also handled
4112 // in the previous switch statement.
4267 // The output overlaps in the case of an object array get with
4275 // path in CodeGeneratorARM::GenerateArrayLoadWithBakerReadBarrier.
4369 // Note that a potential implicit null check is handled in this
4443 // Potential implicit null checks, in the case of reference
4444 // arrays, are handled in the previous switch statement.
4592 // restored afterwards). So in this case, we bail out and
4633 // Note that in the case where `value` is a null reference,
4732 // Objects are handled in the switch.
5159 // Even if the initialized flag is set, we may be in a situation where caches are not synced
5256 // and the remaining offset embedded in the load.
5540 LocationSummary::kNoCall; // In fact, call on a fatal (non-returning) slow path.
5615 // If the class reference currently in `temp` is not null, jump
5622 // going into the slow path, as it has been overwritten in the
5645 // If the class reference currently in `temp` is not null, jump
5651 // going into the slow path, as it has been overwritten in the
5678 // going into the slow path, as it has been overwritten in the
5980 // in the following move operation, as we will need it for the
6116 // In slow path based read barriers, the read barrier call is
6117 // inserted after the original load. However, in fast path based
6131 // Note: the original implementation in ReadBarrier::Barrier is
6336 Location callee_method = temp; // For all kinds except kRecursive, callee will be in temp.
6421 // intrinsics may have put the receiver in a different register. In the intrinsics
6432 // However this is not required in practice, as this is an
6436 // concurrent copying collector may not in the future).
6659 // and they can be encoded in the instruction without making use of IP register.
6704 // Check whether the value is in the table, jump to default block if not.
6746 // TODO: Consider pairs in the parallel move resolver, then this could be nicely merged
