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Lines Matching defs:out

70     // out in this case.
113 Location output = locations->Out();
128 Location output = locations->Out();
197 Register out = locations->Out().AsRegister<Register>();
202 __ bswapl(out);
203 __ sarl(out, Immediate(16));
206 __ bswapl(out);
231 Location output = locations->Out();
277 Location output = locations->Out();
334 Location output = locations->Out();
335 Register out = output.AsRegister<Register>();
336 DCHECK_EQ(out, EAX);
346 // Subtract out sign to correct.
365 Location output = locations->Out();
410 Location out_loc = locations->Out();
411 XmmRegister out = out_loc.AsFpuRegister<XmmRegister>();
419 // (out := op1)
420 // out <=? op2
422 // if out is min jmp done
427 // out := NaN
429 // out := op2
432 // This removes one jmp, but needs to copy one input (op1) to out.
434 // TODO: This is straight from Quick (except literal pool). Make NaN an out-of-line slowpath?
440 __ ucomisd(out, op2);
442 __ ucomiss(out, op2);
453 __ orpd(out, op2);
455 __ orps(out, op2);
459 __ andpd(out, op2);
461 __ andps(out, op2);
473 __ movsd(out, codegen->LiteralInt64Address(kDoubleNaN, constant_area));
475 __ movss(out, codegen->LiteralInt32Address(kFloatNaN, constant_area));
481 __ movsd(out, Address(ESP, 0));
485 __ movss(out, Address(ESP, 0));
491 // out := op2;
494 __ movsd(out, op2);
496 __ movss(out, op2);
578 DCHECK(locations->Out().Equals(op1_loc));
585 Location output = locations->Out();
608 Register out = locations->Out().AsRegister<Register>();
611 // (out := op1)
612 // out <=? op2
613 // if out is min jmp done
614 // out := op2
617 __ cmpl(out, op2);
619 __ cmovl(cond, out, op2);
690 XmmRegister out = locations->Out().AsFpuRegister<XmmRegister>();
692 GetAssembler()->sqrtsd(out, in);
704 Location out = invoke->GetLocations()->Out();
705 if (out.IsValid()) {
706 DCHECK(out.IsRegister());
707 codegen->MoveFromReturnRegister(out, invoke->GetType());
739 XmmRegister out = locations->Out().AsFpuRegister<XmmRegister>();
740 __ roundsd(out, in, Immediate(round_mode));
807 Register out = locations->Out().AsRegister<Register>();
814 __ movl(out, Immediate(bit_cast<int32_t, float>(0.5f)));
815 __ movd(inPlusPointFive, out);
823 __ movl(out, Immediate(kPrimIntMax));
824 // maxInt = int-to-float(out)
825 __ cvtsi2ss(maxInt, out);
835 __ cvttss2si(out, inPlusPointFive);
840 __ xorl(out, out);
1053 Register out = locations->Out().AsRegister<Register>();
1069 // out = out[2*idx].
1070 __ movzxw(out, Address(out, idx, ScaleFactor::TIMES_2, value_offset));
1191 // Bail out if the source and destination are the same (to handle overlap).
1195 // Bail out if the source is null.
1199 // Bail out if the destination is null.
1203 // If the length is negative, bail out.
1223 // Okay, everything checks out. Finally time to do the copy.
1303 Register esi = locations->Out().AsRegister<Register>();
1412 Register out = locations->Out().AsRegister<Register>();
1418 DCHECK_EQ(out, EDI);
1493 __ leal(out, Address(string_length, -1));
1500 __ movl(out, Immediate(-1));
1683 Location out_loc = locations->Out();
1838 Register out = invoke->GetLocations()->Out().AsRegister<Register>();
1839 GetAssembler()->fs()->movl(out, Address::Absolute(Thread::PeerOffset<kX86WordSize>()));
1852 Location output_loc = locations->Out();
2074 bool value_can_be_null = true; // TODO: Worth finding out this information?
2170 Location out = locations->Out();
2171 DCHECK_EQ(out.AsRegister<Register>(), EAX);
2180 bool value_can_be_null = true; // TODO: Worth finding out this information?
2225 __ setb(kZero, out.AsRegister<Register>());
2226 __ movzxb(out.AsRegister<Register>(), out.AsRegister<ByteRegister>());
2235 // Ensure `value` is different from `out`, so that unpoisoning
2237 DCHECK_NE(value, out.AsRegister<Register>());
2241 // `expected`, as it is the same as register `out` (EAX).
2266 __ setb(kZero, out.AsRegister<Register>());
2267 __ movzxb(out.AsRegister<Register>(), out.AsRegister<ByteRegister>());
2385 Register out = locations->Out().AsRegister<Register>();
2393 codegen->Load32BitValue(out, result);
2400 __ popcntl(out, src.AsRegister<Register>());
2403 __ popcntl(out, Address(ESP, src.GetStackIndex()));
2410 __ popcntl(out, src.AsRegisterPairHigh<Register>());
2414 __ popcntl(out, Address(ESP, src.GetHighStackIndex(kX86WordSize)));
2416 __ addl(out, temp);
2453 Register out = locations->Out().AsRegister<Register>();
2463 codegen->Load32BitValue(out, value);
2470 __ bsrl(out, src.AsRegister<Register>());
2473 __ bsrl(out, Address(ESP, src.GetStackIndex()));
2481 __ xorl(out, Immediate(31));
2486 __ movl(out, Immediate(32));
2503 __ bsrl(out, src_hi);
2506 __ xorl(out, Immediate(31));
2511 __ bsrl(out, src_lo);
2515 __ xorl(out, Immediate(63));
2520 __ movl(out, Immediate(64));
2558 Register out = locations->Out().AsRegister<Register>();
2568 codegen->Load32BitValue(out, value);
2575 __ bsfl(out, src.AsRegister<Register>());
2578 __ bsfl(out, Address(ESP, src.GetStackIndex()));
2586 __ movl(out, Immediate(32));
2599 __ bsfl(out, src_lo);
2603 __ bsfl(out, src_hi);
2607 __ addl(out, Immediate(32));
2612 __ movl(out, Immediate(64));