Lines Matching full:condition
66 Condition cond, SetCc set_cc) {
72 Condition cond, SetCc set_cc) {
78 Condition cond, SetCc set_cc) {
83 Condition cond, SetCc set_cc) {
88 Condition cond, SetCc set_cc) {
94 Condition cond, SetCc set_cc) {
100 Condition cond, SetCc set_cc) {
106 Condition cond, SetCc set_cc) {
111 void Arm32Assembler::tst(Register rn, const ShifterOperand& so, Condition cond) {
117 void Arm32Assembler::teq(Register rn, const ShifterOperand& so, Condition cond) {
123 void Arm32Assembler::cmp(Register rn, const ShifterOperand& so, Condition cond) {
128 void Arm32Assembler::cmn(Register rn, const ShifterOperand& so, Condition cond) {
134 Condition cond, SetCc set_cc) {
142 Condition cond ATTRIBUTE_UNUSED,
149 Condition cond, SetCc set_cc) {
155 Condition cond, SetCc set_cc) {
161 Condition cond, SetCc set_cc) {
166 void Arm32Assembler::mul(Register rd, Register rn, Register rm, Condition cond) {
173 Condition cond) {
180 Condition cond) {
187 Register rm, Condition cond) {
194 Register rm, Condition cond) {
200 void Arm32Assembler::sdiv(Register rd, Register rn, Register rm, Condition cond) {
216 void Arm32Assembler::udiv(Register rd, Register rn, Register rm, Condition cond) {
232 void Arm32Assembler::sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond) {
251 void Arm32Assembler::ubfx(Register rd, Register rn, uint32_t lsb, uint32_t width, Condition cond) {
270 void Arm32Assembler::ldr(Register rd, const Address& ad, Condition cond) {
275 void Arm32Assembler::str(Register rd, const Address& ad, Condition cond) {
280 void Arm32Assembler::ldrb(Register rd, const Address& ad, Condition cond) {
285 void Arm32Assembler::strb(Register rd, const Address& ad, Condition cond) {
290 void Arm32Assembler::ldrh(Register rd, const Address& ad, Condition cond) {
295 void Arm32Assembler::strh(Register rd, const Address& ad, Condition cond) {
300 void Arm32Assembler::ldrsb(Register rd, const Address& ad, Condition cond) {
305 void Arm32Assembler::ldrsh(Register rd, const Address& ad, Condition cond) {
310 void Arm32Assembler::ldrd(Register rd, const Address& ad, Condition cond) {
316 void Arm32Assembler::strd(Register rd, const Address& ad, Condition cond) {
325 Condition cond) {
333 Condition cond) {
338 void Arm32Assembler::vmovs(SRegister sd, SRegister sm, Condition cond) {
343 void Arm32Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) {
348 bool Arm32Assembler::vmovs(SRegister sd, float s_imm, Condition cond) {
363 bool Arm32Assembler::vmovd(DRegister dd, double d_imm, Condition cond) {
379 Condition cond) {
385 Condition cond) {
391 Condition cond) {
397 Condition cond) {
403 Condition cond) {
409 Condition cond) {
415 Condition cond) {
421 Condition cond) {
427 Condition cond) {
433 Condition cond) {
439 Condition cond) {
445 Condition cond) {
450 void Arm32Assembler::vabss(SRegister sd, SRegister sm, Condition cond) {
455 void Arm32Assembler::vabsd(DRegister dd, DRegister dm, Condition cond) {
460 void Arm32Assembler::vnegs(SRegister sd, SRegister sm, Condition cond) {
465 void Arm32Assembler::vnegd(DRegister dd, DRegister dm, Condition cond) {
470 void Arm32Assembler::vsqrts(SRegister sd, SRegister sm, Condition cond) {
474 void Arm32Assembler::vsqrtd(DRegister dd, DRegister dm, Condition cond) {
479 void Arm32Assembler::vcvtsd(SRegister sd, DRegister dm, Condition cond) {
484 void Arm32Assembler::vcvtds(DRegister dd, SRegister sm, Condition cond) {
489 void Arm32Assembler::vcvtis(SRegister sd, SRegister sm, Condition cond) {
494 void Arm32Assembler::vcvtid(SRegister sd, DRegister dm, Condition cond) {
499 void Arm32Assembler::vcvtsi(SRegister sd, SRegister sm, Condition cond) {
504 void Arm32Assembler::vcvtdi(DRegister dd, SRegister sm, Condition cond) {
509 void Arm32Assembler::vcvtus(SRegister sd, SRegister sm, Condition cond) {
514 void Arm32Assembler::vcvtud(SRegister sd, DRegister dm, Condition cond) {
519 void Arm32Assembler::vcvtsu(SRegister sd, SRegister sm, Condition cond) {
524 void Arm32Assembler::vcvtdu(DRegister dd, SRegister sm, Condition cond) {
529 void Arm32Assembler::vcmps(SRegister sd, SRegister sm, Condition cond) {
534 void Arm32Assembler::vcmpd(DRegister dd, DRegister dm, Condition cond) {
539 void Arm32Assembler::vcmpsz(SRegister sd, Condition cond) {
544 void Arm32Assembler::vcmpdz(DRegister dd, Condition cond) {
548 void Arm32Assembler::b(Label* label, Condition cond) {
553 void Arm32Assembler::bl(Label* label, Condition cond) {
573 void Arm32Assembler::EmitType01(Condition cond,
593 void Arm32Assembler::EmitType5(Condition cond, int offset, bool link) {
602 void Arm32Assembler::EmitMemOp(Condition cond,
641 void Arm32Assembler::EmitMemOpAddressMode3(Condition cond,
657 void Arm32Assembler::EmitMultiMemOp(Condition cond,
674 void Arm32Assembler::EmitShiftImmediate(Condition cond,
691 void Arm32Assembler::EmitShiftRegister(Condition cond,
709 void Arm32Assembler::EmitBranch(Condition cond, Label* label, bool link) {
721 void Arm32Assembler::clz(Register rd, Register rm, Condition cond) {
735 void Arm32Assembler::movw(Register rd, uint16_t imm16, Condition cond) {
744 void Arm32Assembler::movt(Register rd, uint16_t imm16, Condition cond) {
753 void Arm32Assembler::EmitMiscellaneous(Condition cond, uint8_t op1,
767 void Arm32Assembler::EmitReverseBytes(Register rd, Register rm, Condition cond,
782 void Arm32Assembler::rbit(Register rd, Register rm, Condition cond) {
796 void Arm32Assembler::rev(Register rd, Register rm, Condition cond) {
801 void Arm32Assembler::rev16(Register rd, Register rm, Condition cond) {
806 void Arm32Assembler::revsh(Register rd, Register rm, Condition cond) {
811 void Arm32Assembler::EmitMulOp(Condition cond, int32_t opcode,
830 void Arm32Assembler::ldrex(Register rt, Register rn, Condition cond) {
845 void Arm32Assembler::ldrexd(Register rt, Register rt2, Register rn, Condition cond) {
867 Condition cond) {
882 void Arm32Assembler::strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond) {
905 void Arm32Assembler::clrex(Condition cond) {
913 void Arm32Assembler::nop(Condition cond) {
921 void Arm32Assembler::vmovsr(SRegister sn, Register rt, Condition cond) {
936 void Arm32Assembler::vmovrs(Register rt, SRegister sn, Condition cond) {
952 Condition cond) {
973 Condition cond) {
995 Condition cond) {
1015 Condition cond) {
1035 void Arm32Assembler::vldrs(SRegister sd, const Address& ad, Condition cond) {
1048 void Arm32Assembler::vstrs(SRegister sd, const Address& ad, Condition cond) {
1062 void Arm32Assembler::vldrd(DRegister dd, const Address& ad, Condition cond) {
1075 void Arm32Assembler::vstrd(DRegister dd, const Address& ad, Condition cond) {
1089 void Arm32Assembler::vpushs(SRegister reg, int nregs, Condition cond) {
1094 void Arm32Assembler::vpushd(DRegister reg, int nregs, Condition cond) {
1099 void Arm32Assembler::vpops(SRegister reg, int nregs, Condition cond) {
1104 void Arm32Assembler::vpopd(DRegister reg, int nregs, Condition cond) {
1109 void Arm32Assembler::EmitVPushPop(uint32_t reg, int nregs, bool push, bool dbl, Condition cond) {
1135 void Arm32Assembler::EmitVFPsss(Condition cond, int32_t opcode,
1153 void Arm32Assembler::EmitVFPddd(Condition cond, int32_t opcode,
1171 void Arm32Assembler::EmitVFPsd(Condition cond, int32_t opcode,
1186 void Arm32Assembler::EmitVFPds(Condition cond, int32_t opcode,
1202 Condition cond, SetCc set_cc) {
1209 Condition cond, SetCc set_cc) {
1217 Condition cond, SetCc set_cc) {
1225 Condition cond, SetCc set_cc) {
1230 void Arm32Assembler::Rrx(Register rd, Register rm, Condition cond, SetCc set_cc) {
1236 Condition cond, SetCc set_cc) {
1242 Condition cond, SetCc set_cc) {
1248 Condition cond, SetCc set_cc) {
1254 Condition cond, SetCc set_cc) {
1258 void Arm32Assembler::vmstat(Condition cond) { // VMRS APSR_nzcv, FPSCR
1282 void Arm32Assembler::blx(Register rm, Condition cond) {
1292 void Arm32Assembler::bx(Register rm, Condition cond) {
1302 void Arm32Assembler::Push(Register rd, Condition cond) {
1307 void Arm32Assembler::Pop(Register rd, Condition cond) {
1312 void Arm32Assembler::PushList(RegList regs, Condition cond) {
1317 void Arm32Assembler::PopList(RegList regs, Condition cond) {
1322 void Arm32Assembler::Mov(Register rd, Register rm, Condition cond) {
1399 Condition cond, SetCc set_cc) {
1433 void Arm32Assembler::CmpConstant(Register rn, int32_t value, Condition cond) {
1449 void Arm32Assembler::LoadImmediate(Register rd, int32_t value, Condition cond) {
1471 Condition cond) {
1511 Condition cond) {
1529 Condition cond) {
1548 Condition cond) {
1583 Condition cond) {
1601 Condition cond) {
