Lines Matching full:__v4sf
1301 (__mmask8)__builtin_ia32_cmpps128_mask((__v4sf)(__m128)(a), \
1302 (__v4sf)(__m128)(b), \
1306 (__mmask8)__builtin_ia32_cmpps128_mask((__v4sf)(__m128)(a), \
1307 (__v4sf)(__m128)(b), \
1467 return (__m128) __builtin_ia32_vfmaddps128_mask ((__v4sf) __A,
1468 (__v4sf) __B,
1469 (__v4sf) __C,
1476 return (__m128) __builtin_ia32_vfmaddps128_mask3 ((__v4sf) __A,
1477 (__v4sf) __B,
1478 (__v4sf) __C,
1485 return (__m128) __builtin_ia32_vfmaddps128_maskz ((__v4sf) __A,
1486 (__v4sf) __B,
1487 (__v4sf) __C,
1494 return (__m128) __builtin_ia32_vfmaddps128_mask ((__v4sf) __A,
1495 (__v4sf) __B,
1496 -(__v4sf) __C,
1503 return (__m128) __builtin_ia32_vfmaddps128_maskz ((__v4sf) __A,
1504 (__v4sf) __B,
1505 -(__v4sf) __C,
1512 return (__m128) __builtin_ia32_vfmaddps128_mask3 (-(__v4sf) __A,
1513 (__v4sf) __B,
1514 (__v4sf) __C,
1521 return (__m128) __builtin_ia32_vfmaddps128_maskz (-(__v4sf) __A,
1522 (__v4sf) __B,
1523 (__v4sf) __C,
1530 return (__m128) __builtin_ia32_vfmaddps128_maskz (-(__v4sf) __A,
1531 (__v4sf) __B,
1532 -(__v4sf) __C,
1707 return (__m128) __builtin_ia32_vfmaddsubps128_mask ((__v4sf) __A,
1708 (__v4sf) __B,
1709 (__v4sf) __C,
1716 return (__m128) __builtin_ia32_vfmaddsubps128_mask3 ((__v4sf) __A,
1717 (__v4sf) __B,
1718 (__v4sf) __C,
1725 return (__m128) __builtin_ia32_vfmaddsubps128_maskz ((__v4sf) __A,
1726 (__v4sf) __B,
1727 (__v4sf) __C,
1734 return (__m128) __builtin_ia32_vfmaddsubps128_mask ((__v4sf) __A,
1735 (__v4sf) __B,
1736 -(__v4sf) __C,
1743 return (__m128) __builtin_ia32_vfmaddsubps128_maskz ((__v4sf) __A,
1744 (__v4sf) __B,
1745 -(__v4sf) __C,
1816 return (__m128) __builtin_ia32_vfmsubps128_mask3 ((__v4sf) __A,
1817 (__v4sf) __B,
1818 (__v4sf) __C,
1854 return (__m128) __builtin_ia32_vfmsubaddps128_mask3 ((__v4sf) __A,
1855 (__v4sf) __B,
1856 (__v4sf) __C,
1890 return (__m128) __builtin_ia32_vfnmaddps128_mask ((__v4sf) __A,
1891 (__v4sf) __B,
1892 (__v4sf) __C,
1944 return (__m128) __builtin_ia32_vfnmsubps128_mask ((__v4sf) __A,
1945 (__v4sf) __B,
1946 (__v4sf) __C,
1953 return (__m128) __builtin_ia32_vfnmsubps128_mask3 ((__v4sf) __A,
1954 (__v4sf) __B,
1955 (__v4sf) __C,
2013 return (__m128) __builtin_ia32_addps128_mask ((__v4sf) __A,
2014 (__v4sf) __B,
2015 (__v4sf) __W,
2021 return (__m128) __builtin_ia32_addps128_mask ((__v4sf) __A,
2022 (__v4sf) __B,
2023 (__v4sf)
2075 return (__m128) __builtin_ia32_blendmps_128_mask ((__v4sf) __A,
2076 (__v4sf) __W,
2163 return (__m128) __builtin_ia32_compresssf128_mask ((__v4sf) __A,
2164 (__v4sf) __W,
2170 return (__m128) __builtin_ia32_compresssf128_mask ((__v4sf) __A,
2171 (__v4sf)
2251 __builtin_ia32_compressstoresf128_mask ((__v4sf *) __P,
2252 (__v4sf) __A,
2310 (__v4sf) __W,
2317 (__v4sf)
2370 (__v4sf) __W,
2377 (__v4sf)
2385 (__v4sf) __W,
2392 (__v4sf)
2445 return (__m128i) __builtin_ia32_cvtps2dq128_mask ((__v4sf) __A,
2452 return (__m128i) __builtin_ia32_cvtps2dq128_mask ((__v4sf) __A,
2475 return (__m128d) __builtin_ia32_cvtps2pd128_mask ((__v4sf) __A,
2482 return (__m128d) __builtin_ia32_cvtps2pd128_mask ((__v4sf) __A,
2490 return (__m256d) __builtin_ia32_cvtps2pd256_mask ((__v4sf) __A,
2497 return (__m256d) __builtin_ia32_cvtps2pd256_mask ((__v4sf) __A,
2505 return (__m128i) __builtin_ia32_cvtps2udq128_mask ((__v4sf) __A,
2513 return (__m128i) __builtin_ia32_cvtps2udq128_mask ((__v4sf) __A,
2520 return (__m128i) __builtin_ia32_cvtps2udq128_mask ((__v4sf) __A,
2627 return (__m128i) __builtin_ia32_cvttps2dq128_mask ((__v4sf) __A,
2634 return (__m128i) __builtin_ia32_cvttps2dq128_mask ((__v4sf) __A,
2657 return (__m128i) __builtin_ia32_cvttps2udq128_mask ((__v4sf) __A,
2665 return (__m128i) __builtin_ia32_cvttps2udq128_mask ((__v4sf) __A,
2672 return (__m128i) __builtin_ia32_cvttps2udq128_mask ((__v4sf) __A,
2750 (__v4sf)
2758 (__v4sf) __W,
2765 (__v4sf)
2830 return (__m128) __builtin_ia32_divps_mask ((__v4sf) __A,
2831 (__v4sf) __B,
2832 (__v4sf) __W,
2838 return (__m128) __builtin_ia32_divps_mask ((__v4sf) __A,
2839 (__v4sf) __B,
2840 (__v4sf)
2993 return (__m128) __builtin_ia32_expandloadsf128_mask ((__v4sf *) __P,
2994 (__v4sf) __W,
3000 return (__m128) __builtin_ia32_expandloadsf128_mask ((__v4sf *) __P,
3001 (__v4sf)
3059 return (__m128) __builtin_ia32_expandsf128_mask ((__v4sf) __A,
3060 (__v4sf) __W,
3066 return (__m128) __builtin_ia32_expandsf128_mask ((__v4sf) __A,
3067 (__v4sf)
3165 return (__m128) __builtin_ia32_getexpps128_mask ((__v4sf) __A,
3166 (__v4sf)
3173 return (__m128) __builtin_ia32_getexpps128_mask ((__v4sf) __A,
3174 (__v4sf) __W,
3180 return (__m128) __builtin_ia32_getexpps128_mask ((__v4sf) __A,
3181 (__v4sf)
3246 return (__m128) __builtin_ia32_maxps_mask ((__v4sf) __A,
3247 (__v4sf) __B,
3248 (__v4sf) __W,
3254 return (__m128) __builtin_ia32_maxps_mask ((__v4sf) __A,
3255 (__v4sf) __B,
3256 (__v4sf)
3315 return (__m128) __builtin_ia32_minps_mask ((__v4sf) __A,
3316 (__v4sf) __B,
3317 (__v4sf) __W,
3323 return (__m128) __builtin_ia32_minps_mask ((__v4sf) __A,
3324 (__v4sf) __B,
3325 (__v4sf)
3384 return (__m128) __builtin_ia32_mulps_mask ((__v4sf) __A,
3385 (__v4sf) __B,
3386 (__v4sf) __W,
3392 return (__m128) __builtin_ia32_mulps_mask ((__v4sf) __A,
3393 (__v4sf) __B,
3394 (__v4sf)
3866 (__m128) __builtin_ia32_rndscaleps_128_mask ((__v4sf) __A, __imm, \
3867 (__v4sf) _mm_setzero_ps(), (__mmask8) -1); })
3871 (__m128) __builtin_ia32_rndscaleps_128_mask ((__v4sf) __A, __imm, \
3872 (__v4sf) __W, (__mmask8) __U); })
3876 (__m128) __builtin_ia32_rndscaleps_128_mask ((__v4sf) __A, __imm, \
3877 (__v4sf) _mm_setzero_ps(), (__mmask8) __U); })
3948 return (__m128) __builtin_ia32_scalefps128_mask ((__v4sf) __A,
3949 (__v4sf) __B,
3950 (__v4sf)
3957 return (__m128) __builtin_ia32_scalefps128_mask ((__v4sf) __A,
3958 (__v4sf) __B,
3959 (__v4sf) __W,
3965 return (__m128) __builtin_ia32_scalefps128_mask ((__v4sf) __A,
3966 (__v4sf) __B,
3967 (__v4sf)
4038 (__v2di) __index, (__v4sf) __v1, __scale); })
4043 (__v4sf) __v1, __scale); })
4057 (__v4sf) __v1, __scale); })
4062 (__v4sf) __v1, __scale); })
4113 (__v4si) __index, (__v4sf) __v1, __scale); })
4118 (__v4sf) __v1, __scale); })
4179 return (__m128) __builtin_ia32_sqrtps128_mask ((__v4sf) __A,
4180 (__v4sf) __W,
4186 return (__m128) __builtin_ia32_sqrtps128_mask ((__v4sf) __A,
4187 (__v4sf)
4244 return (__m128) __builtin_ia32_subps128_mask ((__v4sf) __A,
4245 (__v4sf) __B,
4246 (__v4sf) __W,
4252 return (__m128) __builtin_ia32_subps128_mask ((__v4sf) __A,
4253 (__v4sf) __B,
4254 (__v4sf)
4321 return (__m128) __builtin_ia32_vpermi2varps128_mask ((__v4sf) __A,
4324 (__v4sf) __B,
4486 (__v4sf) __A,
4487 (__v4sf) __B,
4496 (__v4sf) __A,
4497 (__v4sf) __B,
4506 (__v4sf) __A,
4507 (__v4sf) __B,
