Lines Matching full:tmp1
51 // CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1
53 // CHECK-NEXT: {{.*}} = and i32 [[TMP2]], [[TMP1]]
58 // CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1
60 // CHECK-NEXT: {{.*}} = and i64 [[TMP2]], [[TMP1]]
101 // CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1
103 // CHECK-NEXT: {{.*}} = or i32 [[TMP2]], [[TMP1]]
108 // CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1
110 // CHECK-NEXT: {{.*}} = or i64 [[TMP2]], [[TMP1]]
115 // CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1
117 // CHECK-NEXT: {{.*}} = or i32 [[TMP2]], [[TMP1]]
122 // CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1
124 // CHECK-NEXT: {{.*}} = or i64 [[TMP2]], [[TMP1]]
129 // CHECK: [[TMP1:%.*]] = xor i32 [[SRC:%.*]], -1
131 // CHECK-NEXT: {{.*}} = and i32 [[TMP2]], [[TMP1]]
136 // CHECK: [[TMP1:%.*]] = xor i64 [[SRC:%.*]], -1
138 // CHECK-NEXT: {{.*}} = and i64 [[TMP2]], [[TMP1]]
