Lines Matching refs:tbin
36 tcache_bin_t *tbin = &tcache->tbins[binind];
39 if (tbin->low_water > 0) {
44 tcache_bin_flush_small(tsd, tcache, tbin, binind,
45 tbin->ncached - tbin->low_water + (tbin->low_water
48 tcache_bin_flush_large(tsd, tbin, binind, tbin->ncached
49 - tbin->low_water + (tbin->low_water >> 2), tcache);
55 if ((tbin_info->ncached_max >> (tbin->lg_fill_div+1)) >= 1)
56 tbin->lg_fill_div++;
57 } else if (tbin->low_water < 0) {
62 if (tbin->lg_fill_div > 1)
63 tbin->lg_fill_div--;
65 tbin->low_water = tbin->ncached;
74 tcache_bin_t *tbin, szind_t binind, bool *tcache_success)
78 arena_tcache_fill_small(tsd, arena, tbin, binind, config_prof ?
82 ret = tcache_alloc_easy(tbin, tcache_success);
88 tcache_bin_flush_small(tsd_t *tsd, tcache_t *tcache, tcache_bin_t *tbin,
97 assert(rem <= tbin->ncached);
101 for (nflush = tbin->ncached - rem; nflush > 0; nflush = ndeferred) {
104 *(tbin->avail - 1));
119 bin->stats.nrequests += tbin->tstats.nrequests;
120 tbin->tstats.nrequests = 0;
124 ptr = *(tbin->avail - 1 - i);
141 *(tbin->avail - 1 - ndeferred) = ptr;
156 bin->stats.nrequests += tbin->tstats.nrequests;
157 tbin->tstats.nrequests = 0;
161 memmove(tbin->avail - rem, tbin->avail - tbin->ncached, rem *
163 tbin->ncached = rem;
164 if ((int)tbin->ncached < tbin->low_water)
165 tbin->low_water = tbin->ncached;
169 tcache_bin_flush_large(tsd_t *tsd, tcache_bin_t *tbin, szind_t binind,
178 assert(rem <= tbin->ncached);
182 for (nflush = tbin->ncached - rem; nflush > 0; nflush = ndeferred) {
185 *(tbin->avail - 1));
201 tbin->tstats.nrequests;
203 tbin->tstats.nrequests;
204 tbin->tstats.nrequests = 0;
209 ptr = *(tbin->avail - 1 - i);
223 *(tbin->avail - 1 - ndeferred) = ptr;
238 arena->stats.nrequests_large += tbin->tstats.nrequests;
240 tbin->tstats.nrequests;
241 tbin->tstats.nrequests = 0;
245 memmove(tbin->avail - rem, tbin->avail - tbin->ncached, rem *
247 tbin->ncached = rem;
248 if ((int)tbin->ncached < tbin->low_water)
249 tbin->low_water = tbin->ncached;
363 tcache_bin_t *tbin = &tcache->tbins[i];
364 tcache_bin_flush_small(tsd, tcache, tbin, i, 0);
366 if (config_stats && tbin->tstats.nrequests != 0) {
369 bin->stats.nrequests += tbin->tstats.nrequests;
375 tcache_bin_t *tbin = &tcache->tbins[i];
376 tcache_bin_flush_large(tsd, tbin, i, 0, tcache);
378 if (config_stats && tbin->tstats.nrequests != 0) {
380 arena->stats.nrequests_large += tbin->tstats.nrequests;
382 tbin->tstats.nrequests;
426 tcache_bin_t *tbin = &tcache->tbins[i];
428 bin->stats.nrequests += tbin->tstats.nrequests;
430 tbin->tstats.nrequests = 0;
435 tcache_bin_t *tbin = &tcache->tbins[i];
436 arena->stats.nrequests_large += tbin->tstats.nrequests;
437 lstats->nrequests += tbin->tstats.nrequests;
438 tbin->tstats.nrequests = 0;
