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402 #define PCI_X_CMD_READ_512 0x0000 /* 512 byte maximum read byte count */
408 #define PCI_X_CMD_SPLIT_1 0x0000 /* Max 1 */
496 #define PCI_EXP_DEVCTL_READRQ_128B 0x0000 /* 128 Bytes */
580 #define PCI_EXP_SLTCTL_PWR_ON 0x0000 /* Power On */
