Lines Matching refs:Cache
38 /// Entry - A cache entry containing interference information for all aliases
44 /// Tag - Cache tag is changed when any of the underlying LiveIntervalUnions
100 assert(!hasRefs() && "Cannot clear cache entry with references");
132 // We don't keep a cache entry for every physical register, that would use too
133 // much memory. Instead, a fixed number of cache entries are used in a round-
145 // The actual cache entries.
162 /// init - Prepare cache for a new function.
170 /// Cursor - The primary query interface for the block interference cache.
202 void setPhysReg(InterferenceCache &Cache, unsigned PhysReg) {
207 setEntry(Cache.get(PhysReg));