Lines Matching refs:LHSReg
162 unsigned emitAddSub_rr(bool UseAdd, MVT RetVT, unsigned LHSReg,
165 unsigned emitAddSub_ri(bool UseAdd, MVT RetVT, unsigned LHSReg,
168 unsigned emitAddSub_rs(bool UseAdd, MVT RetVT, unsigned LHSReg,
173 unsigned emitAddSub_rx(bool UseAdd, MVT RetVT, unsigned LHSReg,
183 bool emitICmp_ri(MVT RetVT, unsigned LHSReg, bool LHSIsKill, uint64_t Imm);
198 unsigned emitSubs_rr(MVT RetVT, unsigned LHSReg, bool LHSIsKill,
200 unsigned emitSubs_rs(MVT RetVT, unsigned LHSReg, bool LHSIsKill,
206 unsigned emitLogicalOp_ri(unsigned ISDOpc, MVT RetVT, unsigned LHSReg,
208 unsigned emitLogicalOp_rs(unsigned ISDOpc, MVT RetVT, unsigned LHSReg,
211 unsigned emitAnd_ri(MVT RetVT, unsigned LHSReg, bool LHSIsKill, uint64_t Imm);
1133 unsigned LHSReg = getRegForValue(LHS);
1134 if (!LHSReg)
1139 LHSReg = emitIntExt(SrcVT, LHSReg, RetVT, IsZExt);
1145 ResultReg = emitAddSub_ri(!UseAdd, RetVT, LHSReg, LHSIsKill, -Imm,
1148 ResultReg = emitAddSub_ri(UseAdd, RetVT, LHSReg, LHSIsKill, Imm, SetFlags,
1152 ResultReg = emitAddSub_ri(UseAdd, RetVT, LHSReg, LHSIsKill, 0, SetFlags,
1168 return emitAddSub_rx(UseAdd, RetVT, LHSReg, LHSIsKill, RHSReg,
1176 return emitAddSub_rx(UseAdd, RetVT, LHSReg, LHSIsKill, RHSReg, RHSIsKill,
1196 ResultReg = emitAddSub_rs(UseAdd, RetVT, LHSReg, LHSIsKill, RHSReg,
1221 ResultReg = emitAddSub_rs(UseAdd, RetVT, LHSReg, LHSIsKill, RHSReg,
1239 return emitAddSub_rr(UseAdd, RetVT, LHSReg, LHSIsKill, RHSReg, RHSIsKill,
1243 unsigned AArch64FastISel::emitAddSub_rr(bool UseAdd, MVT RetVT, unsigned LHSReg,
1247 assert(LHSReg && RHSReg && "Invalid register number.");
1269 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs());
1272 .addReg(LHSReg, getKillRegState(LHSIsKill))
1277 unsigned AArch64FastISel::emitAddSub_ri(bool UseAdd, MVT RetVT, unsigned LHSReg,
1280 assert(LHSReg && "Invalid register number.");
1314 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs());
1316 .addReg(LHSReg, getKillRegState(LHSIsKill))
1322 unsigned AArch64FastISel::emitAddSub_rs(bool UseAdd, MVT RetVT, unsigned LHSReg,
1328 assert(LHSReg && RHSReg && "Invalid register number.");
1354 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs());
1357 .addReg(LHSReg, getKillRegState(LHSIsKill))
1363 unsigned AArch64FastISel::emitAddSub_rx(bool UseAdd, MVT RetVT, unsigned LHSReg,
1369 assert(LHSReg && RHSReg && "Invalid register number.");
1397 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs());
1400 .addReg(LHSReg, getKillRegState(LHSIsKill))
1434 bool AArch64FastISel::emitICmp_ri(MVT RetVT, unsigned LHSReg, bool LHSIsKill,
1436 return emitAddSub_ri(/*UseAdd=*/false, RetVT, LHSReg, LHSIsKill, Imm,
1451 unsigned LHSReg = getRegForValue(LHS);
1452 if (!LHSReg)
1459 .addReg(LHSReg, getKillRegState(LHSIsKill));
1470 .addReg(LHSReg, getKillRegState(LHSIsKill))
1511 unsigned AArch64FastISel::emitSubs_rr(MVT RetVT, unsigned LHSReg,
1514 return emitAddSub_rr(/*UseAdd=*/false, RetVT, LHSReg, LHSIsKill, RHSReg,
1518 unsigned AArch64FastISel::emitSubs_rs(MVT RetVT, unsigned LHSReg,
1523 return emitAddSub_rs(/*UseAdd=*/false, RetVT, LHSReg, LHSIsKill, RHSReg,
1545 unsigned LHSReg = getRegForValue(LHS);
1546 if (!LHSReg)
1553 ResultReg = emitLogicalOp_ri(ISDOpc, RetVT, LHSReg, LHSIsKill, Imm);
1575 ResultReg = emitLogicalOp_rs(ISDOpc, RetVT, LHSReg, LHSIsKill, RHSReg,
1591 ResultReg = emitLogicalOp_rs(ISDOpc, RetVT, LHSReg, LHSIsKill, RHSReg,
1604 ResultReg = fastEmit_rr(VT, VT, ISDOpc, LHSReg, LHSIsKill, RHSReg, RHSIsKill);
1613 unsigned LHSReg, bool LHSIsKill,
1649 fastEmitInst_ri(Opc, RC, LHSReg, LHSIsKill,
1659 unsigned LHSReg, bool LHSIsKill,
1692 fastEmitInst_rri(Opc, RC, LHSReg, LHSIsKill, RHSReg, RHSIsKill,
1701 unsigned AArch64FastISel::emitAnd_ri(MVT RetVT, unsigned LHSReg, bool LHSIsKill,
1703 return emitLogicalOp_ri(ISD::AND, RetVT, LHSReg, LHSIsKill, Imm);
3553 unsigned LHSReg = getRegForValue(LHS);
3554 if (!LHSReg)
3564 MulReg = emitSMULL_rr(MVT::i64, LHSReg, LHSIsKill, RHSReg, RHSIsKill);
3575 // LHSReg and RHSReg cannot be killed by this Mul, since they are
3577 MulReg = emitMul_rr(VT, LHSReg, /*IsKill=*/false, RHSReg,
3579 unsigned SMULHReg = fastEmit_rr(VT, VT, ISD::MULHS, LHSReg, LHSIsKill,
3588 unsigned LHSReg = getRegForValue(LHS);
3589 if (!LHSReg)
3599 MulReg = emitUMULL_rr(MVT::i64, LHSReg, LHSIsKill, RHSReg, RHSIsKill);
3607 // LHSReg and RHSReg cannot be killed by this Mul, since they are
3609 MulReg = emitMul_rr(VT, LHSReg, /*IsKill=*/false, RHSReg,
3611 unsigned UMULHReg = fastEmit_rr(VT, VT, ISD::MULHU, LHSReg, LHSIsKill,
