Lines Matching full:issigned
1576 bool IsSigned = Op.getOpcode() == ISD::SMULO;
1578 unsigned ExtendOpc = IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
1593 if (IsSigned) {
1628 if (IsSigned) {
1841 return makeLibCall(DAG, LC, Op.getValueType(), SrcVal, /*isSigned*/ false,
2053 bool isSigned) {
2063 if (isSigned) {
7612 bool IsSigned = N->getOpcode() == ISD::FP_TO_SINT;
7613 unsigned IntrinsicOpcode = IsSigned ? Intrinsic::aarch64_neon_vcvtfp2fxs
7678 bool IsSigned = Opc == ISD::SINT_TO_FP;
7680 ConvInput = DAG.getNode(IsSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, DL,
7683 unsigned IntrinsicOpcode = IsSigned ? Intrinsic::aarch64_neon_vcvtfxs2fp
