Lines Matching full:const
29 const Triple &TT;
32 AArch64RegisterInfo(const Triple &TT);
34 bool isReservedReg(const MachineFunction &MF, unsigned Reg) const;
37 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
38 const MCPhysReg *
39 getCalleeSavedRegsViaCopy(const MachineFunction *MF) const override;
40 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
41 CallingConv::ID) const override;
43 unsigned getCSRFirstUseCost() const override {
52 const uint32_t *getTLSCallPreservedMask() const;
62 const uint32_t *getThisReturnPreservedMask(const MachineFunction &MF,
63 CallingConv::ID) const;
65 BitVector getReservedRegs(const MachineFunction &MF) const override;
66 const TargetRegisterClass *
67 getPointerRegClass(const MachineFunction &MF,
68 unsigned Kind = 0) const override;
69 const TargetRegisterClass *
70 getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
72 bool requiresRegisterScavenging(const MachineFunction &MF) const override;
73 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
74 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;
76 bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;
77 bool isFrameOffsetLegal(const MachineInstr *MI, unsigned BaseReg,
78 int64_t Offset) const override;
81 int64_t Offset) const override;
83 int64_t Offset) const override;
86 RegScavenger *RS = nullptr) const override;
87 bool cannotEliminateFrame(const MachineFunction &MF) const;
89 bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override;
90 bool hasBasePointer(const MachineFunction &MF) const;
91 unsigned getBaseRegister() const;
94 unsigned getFrameRegister(const MachineFunction &MF) const override;
96 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
97 MachineFunction &MF) const override;
