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Lines Matching full:regwidth

479 static int getRegClass(bool IsVgpr, unsigned RegWidth) {
481     switch (RegWidth) {
492   switch (RegWidth) {
538   unsigned RegWidth;
542     RegWidth = 1;
569     RegWidth = (RegHi - RegLo) + 1;
575       unsigned Size = std::min(RegWidth, 4u);
583   int RCID = getRegClass(IsVgpr, RegWidth);