Lines Matching full:srcreg
314 unsigned DestReg, unsigned SrcReg,
320 assert(DestReg != AMDGPU::SCC && SrcReg != AMDGPU::SCC);
367 assert(AMDGPU::SReg_32RegClass.contains(SrcReg));
369 .addReg(SrcReg, getKillRegState(KillSrc));
374 if (AMDGPU::SReg_64RegClass.contains(SrcReg)) {
376 .addReg(SrcReg, getKillRegState(KillSrc));
379 assert(AMDGPU::VGPR_32RegClass.contains(SrcReg));
382 .addReg(SrcReg, getKillRegState(KillSrc));
388 assert(AMDGPU::SReg_64RegClass.contains(SrcReg));
390 .addReg(SrcReg, getKillRegState(KillSrc));
394 assert(AMDGPU::SReg_128RegClass.contains(SrcReg));
399 assert(AMDGPU::SReg_256RegClass.contains(SrcReg));
404 assert(AMDGPU::SReg_512RegClass.contains(SrcReg));
409 assert(AMDGPU::VGPR_32RegClass.contains(SrcReg) ||
410 AMDGPU::SReg_32RegClass.contains(SrcReg));
412 .addReg(SrcReg, getKillRegState(KillSrc));
416 assert(AMDGPU::VReg_64RegClass.contains(SrcReg) ||
417 AMDGPU::SReg_64RegClass.contains(SrcReg));
422 assert(AMDGPU::VReg_96RegClass.contains(SrcReg));
427 assert(AMDGPU::VReg_128RegClass.contains(SrcReg) ||
428 AMDGPU::SReg_128RegClass.contains(SrcReg));
433 assert(AMDGPU::VReg_256RegClass.contains(SrcReg) ||
434 AMDGPU::SReg_256RegClass.contains(SrcReg));
439 assert(AMDGPU::VReg_512RegClass.contains(SrcReg) ||
440 AMDGPU::SReg_512RegClass.contains(SrcReg));
448 if (RI.getHWRegIndex(DestReg) <= RI.getHWRegIndex(SrcReg))
463 Builder.addReg(RI.getSubReg(SrcReg, SubIdx));
466 Builder.addReg(SrcReg, RegState::Kill | RegState::Implicit);
541 unsigned SrcReg, bool isKill,
566 .addReg(SrcReg) // src
578 .addReg(SrcReg);
588 .addReg(SrcReg) // src
1017 unsigned SrcReg) const {
1019 DstReg) .addReg(SrcReg);
