Lines Matching defs:MBB
125 for (MachineBasicBlock *MBB = From; MBB != To && !MBB->succ_empty();
126 MBB = *MBB->succ_begin()) {
128 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
152 MachineBasicBlock &MBB = *MI.getParent();
155 if (MBB.getParent()->getInfo<SIMachineFunctionInfo>()->getShaderType() !=
157 !shouldSkip(&MBB, &MBB.getParent()->back()))
164 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ))
168 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::EXP))
180 BuildMI(MBB, Insert, DL, TII->get(AMDGPU::S_ENDPGM));
184 MachineBasicBlock &MBB = *MI.getParent();
189 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_AND_SAVEEXEC_B64), Reg)
192 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_XOR_B64), Reg)
202 MachineBasicBlock &MBB = *MI.getParent();
207 BuildMI(MBB, MBB.getFirstNonPHI(), DL,
211 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_XOR_B64), AMDGPU::EXEC)
221 MachineBasicBlock &MBB = *MI.getParent();
227 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_B64), Dst)
235 MachineBasicBlock &MBB = *MI.getParent();
242 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_B64), Dst)
250 MachineBasicBlock &MBB = *MI.getParent();
257 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_OR_B64), Dst)
265 MachineBasicBlock &MBB = *MI.getParent();
269 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_ANDN2_B64), AMDGPU::EXEC)
273 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ))
280 MachineBasicBlock &MBB = *MI.getParent();
284 BuildMI(MBB, MBB.getFirstNonPHI(), DL,
300 MachineBasicBlock &MBB = *MI.getParent();
306 = MBB.getParent()->getInfo<SIMachineFunctionInfo>();
316 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_MOV_B64), AMDGPU::EXEC)
320 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::V_CMPX_LE_F32_e32))
330 MachineBasicBlock &MBB = *MI.getParent();
339 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_ADD_I32), AMDGPU::M0)
343 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::M0)
346 MBB.insert(I, MovRel);
353 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_MOV_B64), Save)
357 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::V_READFIRSTLANE_B32),
362 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::M0)
366 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::V_CMP_EQ_U32_e32))
371 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_AND_SAVEEXEC_B64), AMDGPU::VCC)
375 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_ADD_I32), AMDGPU::M0)
380 MBB.insert(I, MovRel);
383 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_XOR_B64), AMDGPU::EXEC)
388 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ))
392 BuildMI(MBB, &MI, DL, TII->get(AMDGPU::S_MOV_B64), AMDGPU::EXEC)
428 MachineBasicBlock &MBB = *MI.getParent();
439 BuildMI(*MBB.getParent(), DL, TII->get(AMDGPU::V_MOVRELS_B32_e32), Dst)
448 MachineBasicBlock &MBB = *MI.getParent();
459 BuildMI(*MBB.getParent(), DL, TII->get(AMDGPU::V_MOVRELD_B32_e32))
481 MachineBasicBlock &MBB = *BI;
483 for (I = MBB.begin(); I != MBB.end(); I = Next) {
562 MachineBasicBlock &MBB = MF.front();
563 BuildMI(MBB, MBB.getFirstNonPHI(), DebugLoc(), TII->get(AMDGPU::S_WQM_B64),
591 MachineBasicBlock &MBB = MF.front();
593 MachineBasicBlock::iterator Start = MBB.getFirstNonPHI();
598 BuildMI(MBB, Start, NoDL, SMovK, AMDGPU::FLAT_SCR_LO)
602 BuildMI(MBB, Start, NoDL, SMovK, AMDGPU::FLAT_SCR_HI)
