Lines Matching full:cpsr
410 // For conditional branches, we use addOperand to preserve CPSR flags.
509 if ((MO.isRegMask() && MO.clobbersPhysReg(ARM::CPSR)) ||
510 (MO.isReg() && MO.isDef() && MO.getReg() == ARM::CPSR)) {
521 if (MO.isReg() && MO.getReg() == ARM::CPSR && MO.isDef() && !MO.isDead())
585 if (MO.getReg() != ARM::CPSR)
590 // all definitions of CPSR are dead
677 MIB.addReg(ARM::CPSR, RegState::Implicit | getKillRegState(KillSrc));
699 MIB.addReg(ARM::CPSR, RegState::Implicit | RegState::Define);
789 } else if (SrcReg == ARM::CPSR) {
792 } else if (DestReg == ARM::CPSR) {
1811 if (CC == ARMCC::AL || PredReg != ARM::CPSR)
1841 // predicated instructions which will be reading CPSR.
1874 // 4: CPSR use.
1923 // DefMI is not the -S version that sets CPSR, so add an optional %noreg.
1952 /// instruction is encoded with an 'S' bit is determined by the optional CPSR
1955 /// This will go away once we can teach tblgen how to set the optional CPSR def
2422 // There are two possible candidates which can be changed to set CPSR:
2442 // Check that CPSR isn't set between the comparison instruction and the one we
2449 if (Instr.modifiesRegister(ARM::CPSR, TRI) ||
2450 Instr.readsRegister(ARM::CPSR, TRI))
2451 // This instruction modifies or uses CPSR after the one we want to
2512 // Scan forward for the use of CPSR
2515 // It is safe to remove CmpInstr if CPSR is redefined or killed.
2516 // If we are done with the basic block, we need to check whether CPSR is
2528 if (MO.isRegMask() && MO.clobbersPhysReg(ARM::CPSR)) {
2532 if (!MO.isReg() || MO.getReg() != ARM::CPSR)
2538 // Condition code is after the operand before CPSR except for VSELs.
2589 // CPSR can be used multiple times, we should continue.
2608 // If CPSR is not killed nor re-defined, we should check whether it is
2614 if ((*SI)->isLiveIn(ARM::CPSR))
2618 // Toggle the optional operand to CPSR.
2619 MI->getOperand(5).setReg(ARM::CPSR);
2654 if (MO.getReg() == ARM::CPSR && !MO.isDead())
2655 // If DefMI defines CPSR and it is not dead, it's obviously not safe
2663 if (UseMI->getOperand(NumOps-1).getReg() == ARM::CPSR)
3679 if (Reg == ARM::CPSR) {
3681 // fpscr -> cpsr stalls over 20 cycles on A8 (and earlier?)
3685 // CPSR set and branch can be paired in the same cycle.
3692 // For Thumb2 and -Os, prefer scheduling CPSR setting instruction close to
3694 // incur a code size penalty (not able to use the CPSR setting 16-bit
3959 if (MCID.isCall() || MCID.hasImplicitDefOfPhysReg(ARM::CPSR)) {
3960 // When predicated, CPSR is an additional source operand for CPSR updating
3988 if (PredCost && (MCID.isCall() || MCID.hasImplicitDefOfPhysReg(ARM::CPSR))) {
3989 // When predicated, CPSR is an additional source operand for CPSR updating
