Lines Matching full:addrmode
666 class VLD1D<bits<4> op7_4, string Dt, Operand AddrMode>
668 (ins AddrMode:$Rn), IIC_VLD1,
674 class VLD1Q<bits<4> op7_4, string Dt, Operand AddrMode>
676 (ins AddrMode:$Rn), IIC_VLD1x2,
694 multiclass VLD1DWB<bits<4> op7_4, string Dt, Operand AddrMode> {
696 (ins AddrMode:$Rn), IIC_VLD1u,
704 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1u,
711 multiclass VLD1QWB<bits<4> op7_4, string Dt, Operand AddrMode> {
713 (ins AddrMode:$Rn), IIC_VLD1x2u,
721 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1x2u,
739 class VLD1D3<bits<4> op7_4, string Dt, Operand AddrMode>
741 (ins AddrMode:$Rn), IIC_VLD1x3, "vld1", Dt,
747 multiclass VLD1D3WB<bits<4> op7_4, string Dt, Operand AddrMode> {
749 (ins AddrMode:$Rn), IIC_VLD1x2u,
757 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1x2u,
780 class VLD1D4<bits<4> op7_4, string Dt, Operand AddrMode>
782 (ins AddrMode:$Rn), IIC_VLD1x4, "vld1", Dt,
788 multiclass VLD1D4WB<bits<4> op7_4, string Dt, Operand AddrMode> {
790 (ins AddrMode:$Rn), IIC_VLD1x2u,
798 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1x2u,
822 InstrItinClass itin, Operand AddrMode>
824 (ins AddrMode:$Rn), itin,
851 RegisterOperand VdTy, InstrItinClass itin, Operand AddrMode> {
853 (ins AddrMode:$Rn), itin,
861 (ins AddrMode:$Rn, rGPR:$Rm), itin,
1361 Operand AddrMode>
1363 (ins AddrMode:$Rn),
1366 (Ty (NEONvdup (i32 (LoadOp AddrMode:$Rn)))))]> {
1382 Operand AddrMode>
1384 (ins AddrMode:$Rn), IIC_VLD1dup,
1387 (Ty (NEONvdup (i32 (LoadOp AddrMode:$Rn)))))]> {
1405 multiclass VLD1DUPWB<bits<4> op7_4, string Dt, Operand AddrMode> {
1408 (ins AddrMode:$Rn), IIC_VLD1dupu,
1417 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1dupu,
1424 multiclass VLD1QDUPWB<bits<4> op7_4, string Dt, Operand AddrMode> {
1427 (ins AddrMode:$Rn), IIC_VLD1dupu,
1436 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD1dupu,
1453 class VLD2DUP<bits<4> op7_4, string Dt, RegisterOperand VdTy, Operand AddrMode>
1455 (ins AddrMode:$Rn), IIC_VLD2dup,
1481 Operand AddrMode> {
1484 (ins AddrMode:$Rn), IIC_VLD2dupu,
1493 (ins AddrMode:$Rn, rGPR:$Rm), IIC_VLD2dupu,
1539 class VLD3DUPWB<bits<4> op7_4, string Dt, Operand AddrMode>
1541 (ins AddrMode:$Rn, am6offset:$Rm), IIC_VLD3dupu,
1650 class VST1D<bits<4> op7_4, string Dt, Operand AddrMode>
1651 : NLdSt<0,0b00,0b0111,op7_4, (outs), (ins AddrMode:$Rn, VecListOneD:$Vd),
1657 class VST1Q<bits<4> op7_4, string Dt, Operand AddrMode>
1658 : NLdSt<0,0b00,0b1010,op7_4, (outs), (ins AddrMode:$Rn, VecListDPair:$Vd),
1676 multiclass VST1DWB<bits<4> op7_4, string Dt, Operand AddrMode> {
1678 (ins AddrMode:$Rn, VecListOneD:$Vd), IIC_VLD1u,
1686 (ins AddrMode:$Rn, rGPR:$Rm, VecListOneD:$Vd),
1694 multiclass VST1QWB<bits<4> op7_4, string Dt, Operand AddrMode> {
1696 (ins AddrMode:$Rn, VecListDPair:$Vd), IIC_VLD1x2u,
1704 (ins AddrMode:$Rn, rGPR:$Rm, VecListDPair:$Vd),
1724 class VST1D3<bits<4> op7_4, string Dt, Operand AddrMode>
1726 (ins AddrMode:$Rn, VecListThreeD:$Vd),
1732 multiclass VST1D3WB<bits<4> op7_4, string Dt, Operand AddrMode> {
1734 (ins AddrMode:$Rn, VecListThreeD:$Vd), IIC_VLD1x3u,
1742 (ins AddrMode:$Rn, rGPR:$Rm, VecListThreeD:$Vd),
1766 class VST1D4<bits<4> op7_4, string Dt, Operand AddrMode>
1768 (ins AddrMode:$Rn, VecListFourD:$Vd),
1775 multiclass VST1D4WB<bits<4> op7_4, string Dt, Operand AddrMode> {
1777 (ins AddrMode:$Rn, VecListFourD:$Vd), IIC_VLD1x4u,
1785 (ins AddrMode:$Rn, rGPR:$Rm, VecListFourD:$Vd),
1810 InstrItinClass itin, Operand AddrMode>
1811 : NLdSt<0, 0b00, op11_8, op7_4, (outs), (ins AddrMode:$Rn, VdTy:$Vd),
1838 RegisterOperand VdTy, Operand AddrMode> {
1840 (ins AddrMode:$Rn, VdTy:$Vd), IIC_VLD1u,
1848 (ins AddrMode:$Rn, rGPR:$Rm, VdTy:$Vd), IIC_VLD1u,
1855 multiclass VST2QWB<bits<4> op7_4, string Dt, Operand AddrMode> {
1857 (ins AddrMode:$Rn, VecListFourD:$Vd), IIC_VLD1u,
1865 (ins AddrMode:$Rn, rGPR:$Rm, VecListFourD:$Vd),
2051 PatFrag StoreOp, SDNode ExtractOp, Operand AddrMode>
2053 (ins AddrMode:$Rn, DPR:$Vd, nohash_imm:$lane),
2055 [(StoreOp (ExtractOp (Ty DPR:$Vd), imm:$lane), AddrMode:$Rn)]> {
