Lines Matching defs:Latch
253 /// The desired flow is: phi ---> bump -+-> comparison-in-latch.
262 /// +-> comparison-in-latch (against upper_bound-bump),
269 /// couldn't be identified, or if the value in the latch's comparison
367 /// \brief Return the latch block if it's one of the exiting blocks. Otherwise,
371 if (MachineBasicBlock *Latch = L->getLoopLatch()) {
372 if (L->isLoopExiting(Latch))
373 return Latch;
387 MachineBasicBlock *Latch = L->getLoopLatch();
389 if (!Header || !Preheader || !Latch || !ExitingBlock)
410 // latch block, and see if is a result of an addition of form "reg+imm",
413 if (Phi->getOperand(i+1).getMBB() != Latch)
571 MachineBasicBlock *Latch = L->getLoopLatch();
576 else if (MBB == Latch)
593 if (ExitingBlock != Latch && (TB == Latch || FB == Latch)) {
596 bool NotAnalyzed = TII->AnalyzeBranch(*Latch, LTB, LFB, LCond, false);
599 if (TB == Latch)
1148 // Is the induction variable bump feeding the latch condition?
1569 MachineBasicBlock *Latch = L->getLoopLatch();
1572 if (!(Header && Latch && ExitingBlock))
1585 // vreg1 = PHI ..., [ latch, vreg2 ]
1594 if (Phi->getOperand(i+1).getMBB() != Latch)
1626 if (ExitingBlock != Latch && (TB == Latch || FB == Latch)) {
1629 bool NotAnalyzed = TII->AnalyzeBranch(*Latch, LTB, LFB, LCond, false);
1633 // Since latch is not the exiting block, the latch branch should be an
1635 if (TB == Latch)
1642 // The latch/exit block does not go back to the header.
1648 // This case can happen when the Latch has two jumps like this:
1818 MachineBasicBlock *Latch = L->getLoopLatch();
1828 if (!Latch || !ExitingBlock || Header->hasAddressTaken())
1855 // the loop latch. Any additional predecessors of the header should
1872 // Copy all non-latch operands of a header's PHI node to the newly
1878 if (PredB == Latch)
1891 if (PredB != Latch) {
1903 // The header has only two predecessors, but the non-latch predecessor
1913 if (MO.getMBB() != Latch)
1929 if (PB != Latch) {
1940 // It can happen that the latch block will fall through into the header.
1943 bool LatchNotAnalyzed = TII->AnalyzeBranch(*Latch, TB, FB, Tmp2, false);
1947 TII->InsertBranch(*Latch, Header, nullptr, EmptyCond, DL);
