Lines Matching refs:ATReg
48 ATReg(1), Reorder(true), Macro(true), Features(Features_) {}
51 ATReg = Opts->getATRegIndex();
57 unsigned getATRegIndex() const { return ATReg; }
62 ATReg = Reg;
85 unsigned ATReg;
2186 unsigned ATReg = getATReg(IDLoc);
2187 if (!ATReg)
2189 TmpReg = ATReg;
2377 unsigned ATReg = getATReg(IDLoc);
2378 if (!ATReg)
2395 emitRX(Mips::LUi, ATReg, MCOperand::createExpr(HighestExpr), IDLoc,
2397 emitRRX(Mips::DADDiu, ATReg, ATReg, MCOperand::createExpr(HigherExpr),
2399 emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, Instructions);
2400 emitRRX(Mips::DADDiu, ATReg, ATReg, MCOperand::createExpr(HiExpr), IDLoc,
2402 emitRRI(Mips::DSLL, ATReg, ATReg, 16, IDLoc, Instructions);
2403 emitRRX(Mips::DADDiu, ATReg, ATReg, MCOperand::createExpr(LoExpr), IDLoc,
2405 emitRRR(Mips::DADDu, DstReg, ATReg, SrcReg, IDLoc, Instructions);
2420 emitRX(Mips::LUi, ATReg, MCOperand::createExpr(HiExpr), IDLoc,
2424 emitRRX(Mips::DADDiu, ATReg, ATReg, MCOperand::createExpr(LoExpr), IDLoc,
2427 emitRRR(Mips::DADDu, DstReg, DstReg, ATReg, IDLoc, Instructions);
2447 unsigned ATReg = getATReg(IDLoc);
2448 if (!ATReg)
2450 TmpReg = ATReg;
2538 unsigned ATReg = getATReg(IDLoc);
2539 if (!ATReg)
2542 if (loadImmediate(ImmValue, ATReg, Mips::NoRegister, !isGP64bit(), true,
2546 emitRRX(OpCode, DstRegOp.getReg(), ATReg, MemOffsetOp, IDLoc, Instructions);
3002 unsigned ATReg = getATReg(IDLoc);
3003 if (!ATReg)
3006 emitRRI(Mips::ADDiu, ATReg, ZeroReg, -1, IDLoc, Instructions);
3009 emitRRI(Mips::BNE, RtReg, ATReg, BranchTarget, IDLoc, Instructions);
3010 emitRRI(Mips::ADDiu, ATReg, ZeroReg, 1, IDLoc, Instructions);
3011 emitRRI(Mips::DSLL32, ATReg, ATReg, 0x1f, IDLoc, Instructions);
3014 emitRRI(Mips::BNE, RtReg, ATReg, BranchTarget, IDLoc, Instructions);
3015 emitRI(Mips::LUi, ATReg, (uint16_t)0x8000, IDLoc, Instructions);
3019 emitRRI(Mips::TEQ, RsReg, ATReg, 0x6, IDLoc, Instructions);
3022 emitRRI(Mips::BNE, RsReg, ATReg, BranchTargetNoTraps, IDLoc, Instructions);
3054 unsigned ATReg = getATReg(IDLoc);
3055 if (!ATReg)
3065 if (loadImmediate(OffsetValue, ATReg, Mips::NoRegister, !ABI.ArePtrs64bit(),
3076 createAddu(ATReg, ATReg, SrcReg, ABI.ArePtrs64bit(), Instructions);
3079 unsigned FirstLbuDstReg = LoadedOffsetInAT ? DstReg : ATReg;
3080 unsigned SecondLbuDstReg = LoadedOffsetInAT ? ATReg : DstReg;
3081 unsigned LbuSrcReg = LoadedOffsetInAT ? ATReg : SrcReg;
3092 unsigned SllReg = LoadedOffsetInAT ? DstReg : ATReg;
3102 emitRRR(Mips::OR, DstReg, DstReg, ATReg, IDLoc, Instructions);
3125 unsigned ATReg = 0;
3132 ATReg = getATReg(IDLoc);
3133 if (!ATReg)
3139 if (loadImmediate(OffsetValue, ATReg, Mips::NoRegister, !ABI.ArePtrs64bit(),
3150 createAddu(ATReg, ATReg, SrcReg, ABI.ArePtrs64bit(), Instructions);
3153 unsigned FinalSrcReg = LoadedOffsetInAT ? ATReg : SrcReg;
3180 unsigned ATReg = Mips::NoRegister;
3191 ATReg = getATReg(Inst.getLoc());
3192 if (!ATReg)
3195 DstReg = ATReg;
3240 unsigned ATReg = Mips::NoRegister;
3286 ATReg = getATReg(Inst.getLoc());
3287 if (!ATReg)
3290 emitRRR(Mips::SUBu, ATReg, Mips::ZERO, TReg, Inst.getLoc(), Instructions);
3291 emitRRR(FirstShift, ATReg, SReg, ATReg, Inst.getLoc(), Instructions);
3293 emitRRR(Mips::OR, DReg, DReg, ATReg, Inst.getLoc(), Instructions);
3304 unsigned ATReg = Mips::NoRegister;
3351 ATReg = getATReg(Inst.getLoc());
3352 if (!ATReg)
3355 emitRRI(FirstShift, ATReg, SReg, ImmValue, Inst.getLoc(), Instructions);
3357 emitRRR(Mips::OR, DReg, DReg, ATReg, Inst.getLoc(), Instructions);
3368 unsigned ATReg = Mips::NoRegister;
3414 ATReg = getATReg(Inst.getLoc());
3415 if (!ATReg)
3418 emitRRR(Mips::DSUBu, ATReg, Mips::ZERO, TReg, Inst.getLoc(), Instructions);
3419 emitRRR(FirstShift, ATReg, SReg, ATReg, Inst.getLoc(), Instructions);
3421 emitRRR(Mips::OR, DReg, DReg, ATReg, Inst.getLoc(), Instructions);
3432 unsigned ATReg = Mips::NoRegister;
3510 ATReg = getATReg(Inst.getLoc());
3511 if (!ATReg)
3514 emitRRI(FirstShift, ATReg, SReg, ImmValue % 32, Inst.getLoc(), Instructions);
3516 emitRRR(Mips::OR, DReg, DReg, ATReg, Inst.getLoc(), Instructions);
