Lines Matching refs:isZExt
126 unsigned emitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
129 bool IsZExt);
1142 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false);
1150 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true);
1491 if (Outs[0].Flags.isZExt() || Outs[0].Flags.isSExt()) {
1492 bool IsZExt = Outs[0].Flags.isZExt();
1493 SrcReg = emitIntExt(RVVT, SrcReg, DestVT, IsZExt);
1540 bool isZExt = isa<ZExtInst>(I);
1557 if (!emitIntExt(SrcVT, SrcReg, DestVT, ResultReg, isZExt))
1628 unsigned DestReg, bool IsZExt) {
1636 if (IsZExt)
1642 bool isZExt) {
1644 bool Success = emitIntExt(SrcVT, SrcReg, DestVT, DestReg, isZExt);
1715 bool IsZExt = Opcode == Instruction::LShr;
1716 if (!emitIntExt(Op0MVT, Op0Reg, MVT::i32, TempReg, IsZExt))
