Lines Matching refs:Wd
1798 // Don't lower mips_fcaf_[wd] since LLVM folds SETFALSE condcodes away
3119 // insert_fw_pseudo $wd, $wd_in, $n, $fs
3122 // insve_w $wd[$n], $wd_in, $wt[0]
3129 unsigned Wd = MI->getOperand(0).getReg();
3141 BuildMI(*BB, MI, DL, TII->get(Mips::INSVE_W), Wd)
3153 // insert_fd_pseudo $wd, $fs, n
3156 // insve_d $wd[$n], $wd_in, $wt[0]
3165 unsigned Wd = MI->getOperand(0).getReg();
3175 BuildMI(*BB, MI, DL, TII->get(Mips::INSVE_D), Wd)
3185 // Emit the INSERT_([BHWD]|F[WD])_VIDX pseudo instruction.
3188 // (INSERT_([BHWD]|F[WD])_PSEUDO $wd, $wd_in, $n, $rs)
3194 // (SLD_B $wd, $wdtmp2, $wdtmp2, $lanetmp2)
3197 // (INSERT_([BHWD]|F[WD])_PSEUDO $wd, $wd_in, $n, $fs)
3202 // (INSVE_[WD], $wdtmp2, 0, $wdtmp1, 0)
3204 // (SLD_B $wd, $wdtmp2, $wdtmp2, $lanetmp2)
3213 unsigned Wd = MI->getOperand(0).getReg();
3302 BuildMI(*BB, MI, DL, TII->get(Mips::SLD_B), Wd)
3313 // fill_fw_pseudo $wd, $fs
3317 // splati.w $wd, $wt2[0]
3324 unsigned Wd = MI->getOperand(0).getReg();
3334 BuildMI(*BB, MI, DL, TII->get(Mips::SPLATI_W), Wd).addReg(Wt2).addImm(0);
3342 // fill_fd_pseudo $wd, $fs
3346 // splati.d $wd, $wt2[0]
3355 unsigned Wd = MI->getOperand(0).getReg();
3365 BuildMI(*BB, MI, DL, TII->get(Mips::SPLATI_D), Wd).addReg(Wt2).addImm(0);
3373 // fexp2_w_1_pseudo $wd, $wt
3376 // fexp2.w $wd, $ws, $wt
3402 // fexp2_d_1_pseudo $wd, $wt
3405 // fexp2.d $wd, $ws, $wt
