Lines Matching refs:SPCC
1380 static SPCC::CondCodes IntCondCCodeToICC(ISD::CondCode CC) {
1383 case ISD::SETEQ: return SPCC::ICC_E;
1384 case ISD::SETNE: return SPCC::ICC_NE;
1385 case ISD::SETLT: return SPCC::ICC_L;
1386 case ISD::SETGT: return SPCC::ICC_G;
1387 case ISD::SETLE: return SPCC::ICC_LE;
1388 case ISD::SETGE: return SPCC::ICC_GE;
1389 case ISD::SETULT: return SPCC::ICC_CS;
1390 case ISD::SETULE: return SPCC::ICC_LEU;
1391 case ISD::SETUGT: return SPCC::ICC_GU;
1392 case ISD::SETUGE: return SPCC::ICC_CC;
1398 static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) {
1402 case ISD::SETOEQ: return SPCC::FCC_E;
1404 case ISD::SETUNE: return SPCC::FCC_NE;
1406 case ISD::SETOLT: return SPCC::FCC_L;
1408 case ISD::SETOGT: return SPCC::FCC_G;
1410 case ISD::SETOLE: return SPCC::FCC_LE;
1412 case ISD::SETOGE: return SPCC::FCC_GE;
1413 case ISD::SETULT: return SPCC::FCC_UL;
1414 case ISD::SETULE: return SPCC::FCC_ULE;
1415 case ISD::SETUGT: return SPCC::FCC_UG;
1416 case ISD::SETUGE: return SPCC::FCC_UGE;
1417 case ISD::SETUO: return SPCC::FCC_U;
1418 case ISD::SETO: return SPCC::FCC_O;
1419 case ISD::SETONE: return SPCC::FCC_LG;
1420 case ISD::SETUEQ: return SPCC::FCC_UE;
1840 // set LHS/RHS and SPCC to the LHS/RHS of the setcc and SPCC to the condition.
1842 ISD::CondCode CC, unsigned &SPCC) {
1853 SPCC = cast<ConstantSDNode>(LHS.getOperand(2))->getZExtValue();
2162 unsigned &SPCC,
2168 switch(SPCC) {
2170 case SPCC::FCC_E : LibCall = is64Bit? "_Qp_feq" : "_Q_feq"; break;
2171 case SPCC::FCC_NE : LibCall = is64Bit? "_Qp_fne" : "_Q_fne"; break;
2172 case SPCC::FCC_L : LibCall = is64Bit? "_Qp_flt" : "_Q_flt"; break;
2173 case SPCC::FCC_G : LibCall = is64Bit? "_Qp_fgt" : "_Q_fgt"; break;
2174 case SPCC::FCC_LE : LibCall = is64Bit? "_Qp_fle" : "_Q_fle"; break;
2175 case SPCC::FCC_GE : LibCall = is64Bit? "_Qp_fge" : "_Q_fge"; break;
2176 case SPCC::FCC_UL :
2177 case SPCC::FCC_ULE:
2178 case SPCC::FCC_UG :
2179 case SPCC::FCC_UGE:
2180 case SPCC::FCC_U :
2181 case SPCC::FCC_O :
2182 case SPCC::FCC_LG :
2183 case SPCC::FCC_UE : LibCall = is64Bit? "_Qp_cmp" : "_Q_cmp"; break;
2203 switch(SPCC) {
2206 SPCC = SPCC::ICC_NE;
2209 case SPCC::FCC_UL : {
2213 SPCC = SPCC::ICC_NE;
2216 case SPCC::FCC_ULE: {
2218 SPCC = SPCC::ICC_NE;
2221 case SPCC::FCC_UG : {
2223 SPCC = SPCC::ICC_G;
2226 case SPCC::FCC_UGE: {
2228 SPCC = SPCC::ICC_NE;
2232 case SPCC::FCC_U : {
2234 SPCC = SPCC::ICC_E;
2237 case SPCC::FCC_O : {
2239 SPCC = SPCC::ICC_NE;
2242 case SPCC::FCC_LG : {
2246 SPCC = SPCC::ICC_NE;
2249 case SPCC::FCC_UE : {
2253 SPCC = SPCC::ICC_E;
2399 unsigned Opc, SPCC = ~0U;
2403 LookThroughSetCC(LHS, RHS, CC, SPCC);
2409 if (SPCC == ~0U) SPCC = IntCondCCodeToICC(CC);
2414 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2415 CompareFlag = TLI.LowerF128Compare(LHS, RHS, SPCC, dl, DAG);
2419 if (SPCC == ~0U) SPCC
2424 DAG.getConstant(SPCC, dl, MVT::i32), CompareFlag);
2436 unsigned Opc, SPCC = ~0U;
2440 LookThroughSetCC(LHS, RHS, CC, SPCC);
2447 if (SPCC == ~0U) SPCC = IntCondCCodeToICC(CC);
2450 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2451 CompareFlag = TLI.LowerF128Compare(LHS, RHS, SPCC, dl, DAG);
2456 if (SPCC == ~0U) SPCC = FPCondCCodeToFCC(CC);
2460 DAG.getConstant(SPCC, dl, MVT::i32), CompareFlag);
3023 return expandAtomicRMW(MI, BB, SP::MOVICCrr, SPCC::ICC_G);
3025 return expandAtomicRMW(MI, BB, SP::MOVXCCrr, SPCC::ICC_G);
3027 return expandAtomicRMW(MI, BB, SP::MOVICCrr, SPCC::ICC_LE);
3029 return expandAtomicRMW(MI, BB, SP::MOVXCCrr, SPCC::ICC_LE);
3031 return expandAtomicRMW(MI, BB, SP::MOVICCrr, SPCC::ICC_GU);
3033 return expandAtomicRMW(MI, BB, SP::MOVXCCrr, SPCC::ICC_GU);
3035 return expandAtomicRMW(MI, BB, SP::MOVICCrr, SPCC::ICC_LEU);
3037 return expandAtomicRMW(MI, BB, SP::MOVXCCrr, SPCC::ICC_LEU);
3047 unsigned CC = (SPCC::CondCodes)MI->getOperand(3).getImm();
3189 .addMBB(LoopMBB).addImm(SPCC::ICC_NE);
