Lines Matching full:v8i64
83 !if (!eq (EltSize, 64), "v8i64", "v16i32"),
376 def : Pat<(v8f64 (bitconvert (v8i64 VR512:$src))), (v8f64 VR512:$src)>;
381 def : Pat<(v16f32 (bitconvert (v8i64 VR512:$src))), (v16f32 VR512:$src)>;
386 def : Pat<(v8i64 (bitconvert (v16i32 VR512:$src))), (v8i64 VR512:$src)>;
387 def : Pat<(v8i64 (bitconvert (v32i16 VR512:$src))), (v8i64 VR512:$src)>;
388 def : Pat<(v8i64 (bitconvert (v64i8 VR512:$src))), (v8i64 VR512:$src)>;
389 def : Pat<(v8i64 (bitconvert (v8f64 VR512:$src))), (v8i64 VR512:$src)>;
390 def : Pat<(v8i64 (bitconvert (v16f32 VR512:$src))), (v8i64 VR512:$src)>;
391 def : Pat<(v16i32 (bitconvert (v8i64 VR512:$src))), (v16i32 VR512:$src)>;
396 def : Pat<(v32i16 (bitconvert (v8i64 VR512:$src))), (v32i16 VR512:$src)>;
402 def : Pat<(v64i8 (bitconvert (v8i64 VR512:$src))), (v64i8 VR512:$src)>;
484 def : Pat<(v8i64 immAllZerosV), (AVX512_512_SET0)>;
781 (INSERT_SUBREG (v8i64 (IMPLICIT_DEF)),
798 (INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR256X:$src, sub_ymm)>;
945 def : Pat <(v8i64 (X86vzext VK8WM:$mask)),
950 def : Pat<(v8i64 (X86VBroadcast (i64 GR64:$src))),
955 def : Pat<(v8i64 (int_x86_avx512_pbroadcastq_i64_512 (i64 GR64:$src))),
961 def : Pat<(v8i64 (int_x86_avx512_mask_pbroadcast_q_gpr_512 (i64 GR64:$src),
2805 def: Pat<(v8i64 (int_x86_avx512_mask_loadu_q_512 addr:$ptr,
2813 def: Pat<(int_x86_avx512_mask_storeu_q_512 addr:$ptr, (v8i64 VR512:$src),
2819 def : Pat<(v8i64 (vselect VK8WM:$mask, (v8i64 VR512:$src),
2823 def : Pat<(v8i64 (vselect VK8WM:$mask, (bc_v8i64 (v16i32 immAllZerosV)),
2824 (v8i64 VR512:$src))),
3209 def : Pat<(v8i64 (X86Vinsert (bc_v8i64 (v16i32 immAllZerosV)), GR64:$src2, (iPTR 0))),
3215 def : Pat<(v8i64 (X86Vinsert undef, GR64:$src2, (iPTR 0))),
3966 def : Pat <(i8 (int_x86_avx512_mask_ptestm_q_512 (v8i64 VR512:$src1),
3967 (v8i64 VR512:$src2), (i8 -1))),
6248 (v8i32 (VPMOVQDZrr (v8i64 (SUBREG_TO_REG (i32 0),
6574 def v8i1sextv8i64 : PatLeaf<(v8i64 (X86vsrai VR512:$src, (i8 63)))>;
7195 (bc_v8i64 (add (v8i64 VR512:$src), (v8i1sextv8i64)))),
