Lines Matching full:shrn
679 ;CHECK: shrn.8b v0, {{v[0-9]+}}, #1
688 ;CHECK: shrn.4h v0, {{v[0-9]+}}, #1
697 ;CHECK: shrn.2s v0, {{v[0-9]+}}, #1
737 declare <8 x i8> @llvm.aarch64.neon.shrn.v8i8(<8 x i16>, i32) nounwind readnone
738 declare <4 x i16> @llvm.aarch64.neon.shrn.v4i16(<4 x i32>, i32) nounwind readnone
739 declare <2 x i32> @llvm.aarch64.neon.shrn.v2i32(<2 x i64>, i32) nounwind readnone
