Lines Matching full:processor
109 /// Writes and ReadDefs are empty. ProcIndices contains 0 for any processor.
113 /// subtargets. ProcIndices contains 0 for any processor.
116 /// SchedWrites and SchedReads per-processor. InstrClassMap should map the same
125 /// itinerary class. Each inherits the processor index from the ItinRW record
134 // Sorted list of ProcIdx, where ProcIdx==0 implies any processor.
161 // Processor model.
165 // ModelDef is NULL for inferred Models. This happens when a processor defines
166 // an itinerary but no machine model. If the processor defines neither a machine
174 // ItinDefList orders this processor's InstrItinData records by SchedClass idx.
184 // This list is empty if the Processor has no value for Itineraries.
189 // This list is empty if no ItinRW refers to this Processor.
192 // All read/write resources associated with this processor.
196 // Per-operand machine model resources associated with this processor.
227 // List of unique processor models.
230 // Map Processor's MachineModel or ProcItin to a CodeGenProcModel index.
299 // Iterate over the unique processor models.
380 // Initialize a new processor model if it is unique.
