Lines Matching refs:ModelDef
668 Record *ModelDef = AliasRW.TheDef->getValueAsDef("SchedModel");
669 if (&SchedModels.getProcModel(ModelDef) != &ProcModel)
700 PrintFatalError(ProcModel.ModelDef->getLoc(),
722 Record *ModelDef = AliasRW.TheDef->getValueAsDef("SchedModel");
723 if (&SchedModels.getProcModel(ModelDef) != &ProcModel)
754 PrintFatalError(ProcModel.ModelDef->getLoc(),
1173 PrintFatalError(PI->ModelDef->getLoc(), "SchedMachineModel defines "
1179 EmitProcessorProp(OS, PI->ModelDef, "IssueWidth", ',');
1180 EmitProcessorProp(OS, PI->ModelDef, "MicroOpBufferSize", ',');
1181 EmitProcessorProp(OS, PI->ModelDef, "LoopMicroOpBufferSize", ',');
1182 EmitProcessorProp(OS, PI->ModelDef, "LoadLatency", ',');
1183 EmitProcessorProp(OS, PI->ModelDef, "HighLatency", ',');
1184 EmitProcessorProp(OS, PI->ModelDef, "MispredictPenalty", ',');
1186 OS << " " << (bool)(PI->ModelDef ?
1187 PI->ModelDef->getValueAsBit("PostRAScheduler") : 0)
1190 OS << " " << (bool)(PI->ModelDef ?
1191 PI->ModelDef->getValueAsBit("CompleteModel") : 0)
