Lines Matching refs:ProcModel
86 void EmitProcessorResources(const CodeGenProcModel &ProcModel,
89 const CodeGenProcModel &ProcModel);
91 const CodeGenProcModel &ProcModel);
93 const CodeGenProcModel &ProcModel);
94 void GenSchedClassTables(const CodeGenProcModel &ProcModel,
424 const CodeGenProcModel &ProcModel = *PI;
432 if (!ProcModel.hasItineraries())
435 const std::string &Name = ProcModel.ItinsDef->getName();
438 assert(ProcModel.ItinDefList.size() == ItinList.size() && "bad Itins");
444 Record *ItinData = ProcModel.ItinDefList[SchedClassIdx];
605 void SubtargetEmitter::EmitProcessorResources(const CodeGenProcModel &ProcModel,
607 char Sep = ProcModel.ProcResourceDefs.empty() ? ' ' : ',';
611 << ProcModel.ModelName << "ProcResources" << "[] = {\n"
614 for (unsigned i = 0, e = ProcModel.ProcResourceDefs.size(); i < e; ++i) {
615 Record *PRDef = ProcModel.ProcResourceDefs[i];
632 PRDef->getValueAsDef("Super"), ProcModel);
633 SuperIdx = ProcModel.getProcResourceIdx(SuperDef);
655 const CodeGenSchedRW &SchedWrite, const CodeGenProcModel &ProcModel) {
669 if (&SchedModels.getProcModel(ModelDef) != &ProcModel)
674 "defined for processor " + ProcModel.ModelName +
683 for (RecIter WRI = ProcModel.WriteResDefs.begin(),
684 WRE = ProcModel.WriteResDefs.end(); WRI != WRE; ++WRI) {
692 ProcModel.ModelName);
697 // TODO: If ProcModel has a base model (previous generation processor),
700 PrintFatalError(ProcModel.ModelDef->getLoc(),
710 const CodeGenProcModel &ProcModel) {
723 if (&SchedModels.getProcModel(ModelDef) != &ProcModel)
728 "defined for processor " + ProcModel.ModelName +
737 for (RecIter RAI = ProcModel.ReadAdvanceDefs.begin(),
738 RAE = ProcModel.ReadAdvanceDefs.end(); RAI != RAE; ++RAI) {
746 ProcModel.ModelName);
751 // TODO: If ProcModel has a base model (previous generation processor),
754 PrintFatalError(ProcModel.ModelDef->getLoc(),
813 void SubtargetEmitter::GenSchedClassTables(const CodeGenProcModel &ProcModel,
816 if (!ProcModel.hasInstrSchedModel())
844 TI->ProcIndices.end(), ProcModel.Index);
861 SCI->ProcIndices.end(), ProcModel.Index);
874 if (&ProcModel == &SchedModels.getProcModel(RWModelDef)) {
888 for (RecIter II = ProcModel.ItinRWDefs.begin(),
889 IE = ProcModel.ItinRWDefs.end(); II != IE; ++II) {
899 DEBUG(dbgs() << ProcModel.ModelName
911 ProcModel);
930 FindWriteResources(SchedModels.getSchedWrite(*WSI), ProcModel);
947 ExpandProcResources(PRVec, Cycles, ProcModel);
952 WPREntry.ProcResourceIdx = ProcModel.getProcResourceIdx(PRVec[PRIdx]);
978 FindReadAdvance(SchedModels.getSchedRead(Reads[UseIdx]), ProcModel);
