Lines Matching defs:rm
90 void FormatNeonMemory(int Rn, int align, int Rm);
193 int rm = instr->RmValue();
195 PrintRegister(rm);
198 // Special case for using rm only.
314 } else if (format[1] == 'm') { // 'rm: Rm register
415 void Decoder::FormatNeonMemory(int Rn, int align, int Rm) {
422 if (Rm == 15) {
424 } else if (Rm == 13) {
428 "], r%d", Rm);
712 Format(instr, "mul'cond's 'rn, 'rm, 'rs");
716 // of registers as "Rd, Rm, Rs, Rn". But confusingly it uses the
719 Format(instr, "mla'cond's 'rn, 'rm, 'rs, 'rd");
722 // of registers as "Rd, Rm, Rs, Rn". But confusingly it uses the
725 Format(instr, "mls'cond's 'rn, 'rm, 'rs, 'rd");
734 // The order of registers is: <RdLo>, <RdHi>, <Rm>, <Rs>
735 Format(instr, "'um'al'cond's 'rd, 'rn, 'rm, 'rs");
745 Format(instr, "'memop'cond's 'rd, ['rn], -'rm");
753 Format(instr, "'memop'cond's 'rd, ['rn], +'rm");
761 Format(instr, "'memop'cond's 'rd, ['rn, -'rm]'w");
769 Format(instr, "'memop'cond's 'rd, ['rn, +'rm]'w");
786 Format(instr, "'memop'cond'sign'h 'rd, ['rn], -'rm");
794 Format(instr, "'memop'cond'sign'h 'rd, ['rn], +'rm");
802 Format(instr, "'memop'cond'sign'h 'rd, ['rn, -'rm]'w");
810 Format(instr, "'memop'cond'sign'h 'rd, ['rn, +'rm]'w");
828 Format(instr, "bx'cond 'rm");
831 Format(instr, "blx'cond 'rm");
843 Format(instr, "clz'cond 'rd, 'rm");
1001 Format(instr, "pkhbt'cond 'rd, 'rn, 'rm, lsl #'imm05@07");
1004 Format(instr, "pkhtb'cond 'rd, 'rn, 'rm, asr #32");
1006 Format(instr, "pkhtb'cond 'rd, 'rn, 'rm, asr #'imm05@07");
1020 Format(instr, "usat 'rd, #'imm05@16, 'rm'shift_sat");
1034 Format(instr, "sxtb'cond 'rd, 'rm");
1037 Format(instr, "sxtb'cond 'rd, 'rm, ror #8");
1040 Format(instr, "sxtb'cond 'rd, 'rm, ror #16");
1043 Format(instr, "sxtb'cond 'rd, 'rm, ror #24");
1049 Format(instr, "sxtab'cond 'rd, 'rn, 'rm");
1052 Format(instr, "sxtab'cond 'rd, 'rn, 'rm
1055 Format(instr, "sxtab'cond 'rd, 'rn, 'rm, ror #16");
1058 Format(instr, "sxtab'cond 'rd, 'rn, 'rm, ror #24");
1066 Format(instr, "sxth'cond 'rd, 'rm");
1069 Format(instr, "sxth'cond 'rd, 'rm, ror #8");
1072 Format(instr, "sxth'cond 'rd, 'rm, ror #16");
1075 Format(instr, "sxth'cond 'rd, 'rm, ror #24");
1081 Format(instr, "sxtah'cond 'rd, 'rn, 'rm");
1084 Format(instr, "sxtah'cond 'rd, 'rn, 'rm, ror #8");
1087 Format(instr, "sxtah'cond 'rd, 'rn, 'rm, ror #16");
1090 Format(instr, "sxtah'cond 'rd, 'rn, 'rm, ror #24");
1104 Format(instr, "uxtb16'cond 'rd, 'rm");
1107 Format(instr, "uxtb16'cond 'rd, 'rm, ror #8");
1110 Format(instr, "uxtb16'cond 'rd, 'rm, ror #16");
1113 Format(instr, "uxtb16'cond 'rd, 'rm, ror #24");
1129 Format(instr, "uxtb'cond 'rd, 'rm");
1132 Format(instr, "uxtb'cond 'rd, 'rm, ror #8");
1135 Format(instr, "uxtb'cond 'rd, 'rm, ror #16");
1138 Format(instr, "uxtb'cond 'rd, 'rm, ror #24");
1144 Format(instr, "uxtab'cond 'rd, 'rn, 'rm");
1147 Format(instr, "uxtab'cond 'rd, 'rn, 'rm, ror #8");
1150 Format(instr, "uxtab'cond 'rd, 'rn, 'rm, ror #16");
1153 Format(instr, "uxtab'cond 'rd, 'rn, 'rm, ror #24");
1161 Format(instr, "uxth'cond 'rd, 'rm");
1164 Format(instr, "uxth'cond 'rd, 'rm, ror #8");
1167 Format(instr, "uxth'cond 'rd, 'rm, ror #16");
1170 Format(instr, "uxth'cond 'rd, 'rm, ror #24");
1176 Format(instr, "uxtah'cond 'rd, 'rn, 'rm");
1179 Format(instr, "uxtah'cond 'rd, 'rn, 'rm, ror #8");
1182 Format(instr, "uxtah'cond 'rd, 'rn, 'rm, ror #16");
1185 Format(instr, "uxtah'cond 'rd, 'rn, 'rm, ror #24");
1203 Format(instr, "smmul'cond 'rn, 'rm, 'rs");
1206 Format(instr, "smmla'cond 'rn, 'rm, 'rs, 'rd");
1215 // UDIV (in V8 notation matching ARM ISA format) rn = rm/rs
1216 Format(instr, "udiv'cond'b 'rn, 'rm, 'rs");
1218 // SDIV (in V8 notation matching ARM ISA format) rn = rm/rs
1219 Format(instr, "sdiv'cond'b 'rn, 'rm, 'rs");
1235 Format(instr, "ubfx'cond 'rd, 'rm, 'f");
1237 Format(instr, "sbfx'cond 'rd, 'rm, 'f");
1249 Format(instr, "bfi'cond 'rd, 'rm, 'f");
1730 int Rm = instr->VmValue();
1735 FormatNeonMemory(Rn, align, Rm);
1743 int Rm = instr->VmValue();
1748 FormatNeonMemory(Rn, align, Rm);
