Lines Matching refs:Operand
360 class Operand BASE_EMBEDDED {
363 Operand(Register base, int32_t disp);
366 Operand(Register base,
372 Operand(Register index,
376 // Offset from existing memory operand.
379 Operand(const Operand& base, int32_t offset);
382 explicit Operand(Label* label);
385 // Does not check the "reg" part of the Operand.
409 // Adds operand displacement fields (offsets added to the memory address).
672 void pushq(const Operand& src);
675 void popq(const Operand& dst);
681 void movb(Register dst, const Operand& src);
683 void movb(const Operand& dst, Register src);
684 void movb(const Operand& dst, Immediate imm);
688 void movw(Register dst, const Operand& src);
689 void movw(const Operand& dst, Register src);
690 void movw(const Operand& dst, Immediate imm);
694 void movl(const Operand& dst, Label* src);
704 void movsxbl(Register dst, const Operand& src);
705 void movsxbq(Register dst, const Operand& src);
707 void movsxwl(Register dst, const Operand& src);
708 void movsxwq(Register dst, const Operand& src);
710 void movsxlq(Register dst, const Operand& src);
726 void cmovq(Condition cc, Register dst, const Operand& src);
728 void cmovl(Condition cc, Register dst, const Operand& src);
740 void cmpb(Register dst, const Operand& src) {
744 void cmpb(const Operand& dst, Register src) {
748 void cmpb(const Operand& dst, Immediate src) {
752 void cmpw(const Operand& dst, Immediate src) {
760 void cmpw(Register dst, const Operand& src) {
768 void cmpw(const Operand& dst, Register src) {
777 void decb(const Operand& dst);
786 void mull(const Operand& src);
803 void instruction##p(Operand dst, Immediate imm8) { \
807 void instruction##l(Operand dst, Immediate imm8) { \
811 void instruction##q(Operand dst, Immediate imm8) { \
821 void instruction##p_cl(Operand dst) { shift(dst, subcode, kPointerSize); } \
823 void instruction##l_cl(Operand dst) { shift(dst, subcode, kInt32Size); } \
825 void instruction##q_cl(Operand dst) { shift(dst, subcode, kInt64Size); }
844 void testb(const Operand& op, Immediate mask);
845 void testb(const Operand& op, Register reg);
848 void bt(const Operand& dst, Register src);
849 void bts(const Operand& dst, Register src);
851 void bsrq(Register dst, const Operand& src);
853 void bsrl(Register dst, const Operand& src);
855 void bsfq(Register dst, const Operand& src);
857 void bsfl(Register dst, const Operand& src);
914 void jmp(const Operand& src);
931 void fld_s(const Operand& adr);
932 void fld_d(const Operand& adr);
934 void fstp_s(const Operand& adr);
935 void fstp_d(const Operand& adr);
938 void fild_s(const Operand& adr);
939 void fild_d(const Operand& adr);
941 void fist_s(const Operand& adr);
943 void fistp_s(const Operand& adr);
944 void fistp_d(const Operand& adr);
946 void fisttp_s(const Operand& adr);
947 void fisttp_d(const Operand& adr);
957 void fisub_s(const Operand& adr);
996 void addss(XMMRegister dst, const Operand& src);
998 void subss(XMMRegister dst, const Operand& src);
1000 void mulss(XMMRegister dst, const Operand& src);
1002 void divss(XMMRegister dst, const Operand& src);
1005 void maxss(XMMRegister dst, const Operand& src);
1007 void minss(XMMRegister dst, const Operand& src);
1010 void sqrtss(XMMRegister dst, const Operand& src);
1013 void ucomiss(XMMRegister dst, const Operand& src);
1022 void movss(XMMRegister dst, const Operand& src);
1023 void movss(const Operand& dst, XMMRegister src);
1026 void cvttss2si(Register dst, const Operand& src);
1031 void andps(XMMRegister dst, const Operand& src);
1033 void orps(XMMRegister dst, const Operand& src);
1035 void xorps(XMMRegister dst, const Operand& src);
1038 void addps(XMMRegister dst, const Operand& src);
1040 void subps(XMMRegister dst, const Operand& src);
1042 void mulps(XMMRegister dst, const Operand& src);
1044 void divps(XMMRegister dst, const Operand& src);
1050 void movd(XMMRegister dst, const Operand& src);
1062 void movsd(const Operand& dst, XMMRegister src);
1063 void movsd(XMMRegister dst, const Operand& src);
1065 void movdqa(const Operand& dst, XMMRegister src);
1066 void movdqa(XMMRegister dst, const Operand& src);
1068 void movdqu(const Operand& dst, XMMRegister src);
1069 void movdqu(XMMRegister dst, const Operand& src);
1078 void cvttsd2si(Register dst, const Operand& src);
1081 void cvttss2siq(Register dst, const Operand& src);
1083 void cvttsd2siq(Register dst, const Operand& src);
1085 void cvtlsi2sd(XMMRegister dst, const Operand& src);
1088 void cvtqsi2ss(XMMRegister dst, const Operand& src);
1091 void cvtqsi2sd(XMMRegister dst, const Operand& src);
1096 void cvtss2sd(XMMRegister dst, const Operand& src);
1098 void cvtsd2ss(XMMRegister dst, const Operand& src);
1104 void addsd(XMMRegister dst, const Operand& src);
1106 void subsd(XMMRegister dst, const Operand& src);
1108 void mulsd(XMMRegister dst, const Operand& src);
1110 void divsd(XMMRegister dst, const Operand& src);
1113 void maxsd(XMMRegister dst, const Operand& src);
1115 void minsd(XMMRegister dst, const Operand& src);
1121 void sqrtsd(XMMRegister dst, const Operand& src);
1124 void ucomisd(XMMRegister dst, const Operand& src);
1139 void pinsrd(XMMRegister dst, const Operand& src, int8_t imm8);
1154 void vfmadd132sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1157 void vfmadd213sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1160 void vfmadd231sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1172 void vfmsub132sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1175 void vfmsub213sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1178 void vfmsub231sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1190 void vfnmadd132sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1193 void vfnmadd213sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1196 void vfnmadd231sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1208 void vfnmsub132sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1211 void vfnmsub213sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1214 void vfnmsub231sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1218 void vfmasd(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
1229 void vfmadd132ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1232 void vfmadd213ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1235 void vfmadd231ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1247 void vfmsub132ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1250 void vfmsub213ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1253 void vfmsub231ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1265 void vfnmadd132ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1268 void vfnmadd213ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1271 void vfnmadd231ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1283 void vfnmsub132ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1286 void vfnmsub213ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1289 void vfnmsub231ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1293 void vfmass(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
1296 void vmovd(XMMRegister dst, const Operand& src);
1299 void vmovq(XMMRegister dst, const Operand& src);
1305 void vmovsd(XMMRegister dst, const Operand& src) {
1308 void vmovsd(const Operand& dst, XMMRegister src) {
1328 void instr(XMMRegister dst, XMMRegister src1, const Operand& src2) { \
1363 void vcvtss2sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1370 void vcvtlsi2sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1377 void vcvtqsi2ss(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1384 void vcvtqsi2sd(XMMRegister dst, XMMRegister src1, const Operand& src2) {
1391 void vcvttsd2si(Register dst, const Operand& src) {
1399 void vcvttss2siq(Register dst, const Operand& src) {
1407 void vcvttsd2siq(Register dst, const Operand& src) {
1418 void vucomisd(XMMRegister dst, const Operand& src) {
1435 void vsd(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2) {
1440 void vsd(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2,
1446 void vmovss(XMMRegister dst, const Operand& src) {
1449 void vmovss(const Operand& dst, XMMRegister src) {
1453 void vucomiss(XMMRegister dst, const Operand& src);
1455 void vss(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
1465 void vps(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
1467 void vpd(byte op, XMMRegister dst, XMMRegister src1, const Operand& src2);
1473 void andnq(Register dst, Register src1, const Operand& src2) {
1479 void andnl(Register dst, Register src1, const Operand& src2) {
1485 void bextrq(Register dst, const Operand& src1, Register src2) {
1491 void bextrl(Register dst, const Operand& src1, Register src2) {
1498 void blsiq(Register dst, const Operand& src) {
1506 void blsil(Register dst, const Operand& src) {
1514 void blsmskq(Register dst, const Operand& src) {
1522 void blsmskl(Register dst, const Operand& src) {
1530 void blsrq(Register dst, const Operand& src) {
1538 void blsrl(Register dst, const Operand& src) {
1543 void tzcntq(Register dst, const Operand& src);
1545 void tzcntl(Register dst, const Operand& src);
1548 void lzcntq(Register dst, const Operand& src);
1550 void lzcntl(Register dst, const Operand& src);
1553 void popcntq(Register dst, const Operand& src);
1555 void popcntl(Register dst, const Operand& src);
1560 void bzhiq(Register dst, const Operand& src1, Register src2) {
1566 void bzhil(Register dst, const Operand& src1, Register src2) {
1572 void mulxq(Register dst1, Register dst2, const Operand& src) {
1578 void mulxl(Register dst1, Register dst2, const Operand& src) {
1584 void pdepq(Register dst, Register src1, const Operand& src2) {
1590 void pdepl(Register dst, Register src1, const Operand& src2) {
1596 void pextq(Register dst, Register src1, const Operand& src2) {
1602 void pextl(Register dst, Register src1, const Operand& src2) {
1608 void sarxq(Register dst, const Operand& src1, Register src2) {
1614 void sarxl(Register dst, const Operand& src1, Register src2) {
1620 void shlxq(Register dst, const Operand& src1, Register src2) {
1626 void shlxl(Register dst, const Operand& src1, Register src2) {
1632 void shrxq(Register dst, const Operand& src1, Register src2) {
1638 void shrxl(Register dst, const Operand& src1, Register src2) {
1642 void rorxq(Register dst, const Operand& src, byte imm8);
1644 void rorxl(Register dst, const Operand& src, byte imm8);
1704 void call(const Operand& operand);
1729 // Emits a REX prefix that encodes a 64-bit operand size and
1737 // Emits a REX prefix that encodes a 64-bit operand size and
1742 inline void emit_rex_64(Register reg, const Operand& op);
1743 inline void emit_rex_64(XMMRegister reg, const Operand& op);
1745 // Emits a REX prefix that encodes a 64-bit operand size and
1751 // Emits a REX prefix that encodes a 64-bit operand size and
1756 inline void emit_rex_64(const Operand& op);
1758 // Emit a REX prefix that only sets REX.W to choose a 64-bit operand size.
1768 inline void emit_rex_32(Register reg, const Operand& op);
1776 inline void emit_rex_32(const Operand& op);
1786 inline void emit_optional_rex_32(Register reg, const Operand& op);
1800 // As for emit_optional_rex_32(Register, const Operand&), except that
1802 inline void emit_optional_rex_32(XMMRegister reg, const Operand& op);
1809 // Optionally do as emit_rex_32(const Operand&) if the operand register
1811 inline void emit_optional_rex_32(const Operand& op);
1847 inline void emit_vex3_byte1(XMMRegister reg, const Operand& rm,
1857 inline void emit_vex_prefix(XMMRegister reg, XMMRegister v, const Operand& rm,
1860 inline void emit_vex_prefix(Register reg, Register v, const Operand& rm,
1865 // 1- or 4-byte offset for a memory operand. Also encodes
1866 // the second operand of the operation, a register or operation
1868 void emit_operand(Register reg, const Operand& adr) {
1873 // 1- or 4-byte offset for a memory operand. Also used to encode
1875 void emit_operand(int rm, const Operand& adr);
1894 void emit_sse_operand(XMMRegister reg, const Operand& adr);
1895 void emit_sse_operand(Register reg, const Operand& adr);
1904 void arithmetic_op_8(byte opcode, Register reg, const Operand& rm_reg);
1906 void arithmetic_op_16(byte opcode, Register reg, const Operand& rm_reg);
1911 const Operand& rm_reg,
1918 const Operand& dst,
1925 const Operand& dst,
1933 const Operand& dst,
1938 void shift(Operand dst, Immediate shift_amount, int subcode, int size);
1942 void shift(Operand dst, int subcode, int size);
1962 void emit_add(Register dst, const Operand& src, int size) {
1966 void emit_add(const Operand& dst, Register src, int size) {
1970 void emit_add(const Operand& dst, Immediate src, int size) {
1978 void emit_and(Register dst, const Operand& src, int size) {
1982 void emit_and(const Operand& dst, Register src, int size) {
1990 void emit_and(const Operand& dst, Immediate src, int size) {
1998 void emit_cmp(Register dst, const Operand& src, int size) {
2002 void emit_cmp(const Operand& dst, Register src, int size) {
2010 void emit_cmp(const Operand& dst, Immediate src, int size) {
2015 void emit_dec(const Operand& dst, int size);
2026 void emit_imul(const Operand& src, int size);
2028 void emit_imul(Register dst, const Operand& src, int size);
2030 void emit_imul(Register dst, const Operand& src, Immediate imm, int size);
2033 void emit_inc(const Operand& dst, int size);
2035 void emit_lea(Register dst, const Operand& src, int size);
2037 void emit_mov(Register dst, const Operand& src, int size);
2039 void emit_mov(const Operand& dst, Register src, int size);
2041 void emit_mov(const Operand& dst, Immediate value, int size);
2043 void emit_movzxb(Register dst, const Operand& src, int size);
2045 void emit_movzxw(Register dst, const Operand& src, int size);
2049 void emit_neg(const Operand& dst, int size);
2052 void emit_not(const Operand& dst, int size);
2058 void emit_or(Register dst, const Operand& src, int size) {
2062 void emit_or(const Operand& dst, Register src, int size) {
2070 void emit_or(const Operand& dst, Immediate src, int size) {
2088 void emit_sub(Register dst, const Operand& src, int size) {
2092 void emit_sub(const Operand& dst, Register src, int size) {
2096 void emit_sub(const Operand& dst, Immediate src, int size) {
2102 void emit_test(const Operand& op, Register reg, int size);
2103 void emit_test(const Operand& op, Immediate mask, int size);
2104 void emit_test(Register reg, const Operand& op, int size) {
2109 void emit_xchg(Register dst, const Operand& src, int size);
2121 void emit_xor(Register dst, const Operand& src, int size) {
2129 void emit_xor(const Operand& dst, Immediate src, int size) {
2133 void emit_xor(const Operand& dst, Register src, int size) {
2139 void bmi1q(byte op, Register reg, Register vreg, const Operand& rm);
2141 void bmi1l(byte op, Register reg, Register vreg, const Operand& rm);
2144 const Operand& rm);
2147 const Operand& rm);
