Lines Matching full:ulong
83 ULong u0, v0, w0;
95 *rLo = (Long)((ULong)u * (ULong)v);
98 static void mullU64 ( ULong u, ULong v, ULong* rHi, ULong* rLo )
100 const ULong halfMask = 0xFFFFFFFFULL;
101 ULong u0, v0, w0;
102 ULong u1, v1, w1,w2,t;
156 return (ULong)x << n;
161 /* identity on ULong */
162 static inline ULong idULong ( ULong x )
169 /* const */ ULong DATA_MASK \
177 /* const */ ULong SIGN_MASK = 1ULL << (__data_bits - 1); \
178 /* const */ ULong CC_DEP1 = cc_dep1_formal; \
179 /* const */ ULong CC_DEP2 = cc_dep2_formal; \
180 /* const */ ULong CC_NDEP = cc_ndep_formal; \
195 { ULong cf, pf, af, zf, sf, of; \
196 ULong argL, argR, res; \
216 { ULong cf, pf, af, zf, sf, of; \
217 ULong argL, argR, res; \
237 { ULong cf, pf, af, zf, sf, of; \
238 ULong argL, argR, oldC, res; \
262 { ULong cf, pf, af, zf, sf, of; \
263 ULong argL, argR, oldC, res; \
287 { ULong cf, pf, af, zf, sf, of; \
303 { ULong cf, pf, af, zf, sf, of; \
304 ULong argL, argR, res; \
323 { ULong cf, pf, af, zf, sf, of; \
324 ULong argL, argR, res; \
334 == ((ULong)SIGN_MASK - 1)) << 11; \
344 { ULong cf, pf, af, zf, sf, of; \
362 { ULong cf, pf, af, zf, sf, of; \
382 { ULong fl \
399 { ULong fl \
415 { ULong cf, pf, af, zf, sf, of; \
441 { ULong cf, pf, af, zf, sf, of; \
466 { ULong cf, pf, af, zf, sf, of; \
467 ULong lo, hi; \
468 mullU64( (ULong)CC_DEP1, (ULong)CC_DEP2, &hi, &lo ); \
484 { ULong cf, pf, af, zf, sf, of; \
502 { ULong cf, pf, af, zf, sf, of; \
518 { ULong cf, pf, af, zf, sf, of; \
550 { ULong cf, pf, af, zf, sf, of; \
642 ULong amd64g_calculate_rflags_all_WRK ( ULong cc_op,
643 ULong cc_dep1_formal,
644 ULong cc_dep2_formal,
645 ULong cc_ndep_formal )
656 case AMD64G_CC_OP_ADDQ: ACTIONS_ADD( 64, ULong );
661 case AMD64G_CC_OP_ADCQ: ACTIONS_ADC( 64, ULong );
666 case AMD64G_CC_OP_SUBQ: ACTIONS_SUB( 64, ULong );
671 case AMD64G_CC_OP_SBBQ: ACTIONS_SBB( 64, ULong );
676 case AMD64G_CC_OP_LOGICQ: ACTIONS_LOGIC( 64, ULong );
681 case AMD64G_CC_OP_INCQ: ACTIONS_INC( 64, ULong );
686 case AMD64G_CC_OP_DECQ: ACTIONS_DEC( 64, ULong );
691 case AMD64G_CC_OP_SHLQ: ACTIONS_SHL( 64, ULong );
696 case AMD64G_CC_OP_SHRQ: ACTIONS_SHR( 64, ULong );
701 case AMD64G_CC_OP_ROLQ: ACTIONS_ROL( 64, ULong );
706 case AMD64G_CC_OP_RORQ: ACTIONS_ROR( 64, ULong );
713 ULong, idULong );
727 case AMD64G_CC_OP_ANDN64: ACTIONS_ANDN( 64, ULong );
730 case AMD64G_CC_OP_BLSI64: ACTIONS_BLSI( 64, ULong );
733 case AMD64G_CC_OP_BLSMSK64: ACTIONS_BLSMSK( 64, ULong );
736 case AMD64G_CC_OP_BLSR64: ACTIONS_BLSR( 64, ULong );
750 ULong amd64g_calculate_rflags_all ( ULong cc_op,
751 ULong cc_dep1,
752 ULong cc_dep2,
753 ULong cc_ndep )
767 ULong amd64g_calculate_rflags_c ( ULong cc_op,
768 ULong cc_dep1,
769 ULong cc_dep2,
770 ULong cc_ndep )
816 ULong amd64g_calculate_condition ( ULong/*AMD64Condcode*/ cond,
817 ULong cc_op,
818 ULong cc_dep1,
819 ULong cc_dep2,
820 ULong cc_ndep )
822 ULong rflags = amd64g_calculate_rflags_all_WRK(cc_op, cc_dep1,
824 ULong of,sf,zf,cf,pf;
825 ULong inv = cond & 1;
894 ULong LibVEX_GuestAMD64_get_rflags ( /*IN*/const VexGuestAMD64State* vex_state )
896 ULong rflags = amd64g_calculate_rflags_all_WRK(
916 LibVEX_GuestAMD64_put_rflags ( ULong rflags,
953 LibVEX_GuestAMD64_put_rflag_c ( ULong new_carry_flag,
956 ULong oszacp = amd64g_calculate_rflags_all_WRK(
983 static Bool isU64 ( IRExpr* e, ULong n )
1419 --> (ULong)dst[7]
1433 --> (ULong) !dst[7]
1499 /* long and/or/xor, then S --> (ULong)result[31] */
1505 /* long and/or/xor, then S --> (ULong) ~ result[31] */
1617 ULong nnn = isU64(cond, AMD64CondBE) ? 1 : 0;
1771 ULong amd64g_calculate_FXAM ( ULong tag, ULong dbl )
1851 ULong* vexRegs = (ULong*)(&vex_state->guest_FPREG[0]);
1860 ULong pair;
1892 pair = amd64g_check_fldcw ( (ULong)fpucw );
1911 ULong* vexRegs = (ULong*)(&vex_state->guest_FPREG[0]);
2157 ULong w64 = amd64g_check_ldmxcsr( (ULong)w32 );
2235 gst->guest_FPROUND = (ULong
2242 ULong amd64g_dirtyhelper_loadF80le ( Addr addrU )
2244 ULong f64;
2251 void amd64g_dirtyhelper_storeF80le ( Addr addrU, ULong f64 )
2263 ULong amd64g_check_ldmxcsr ( ULong mxcsr )
2267 ULong rmode = (mxcsr >> 13) & 3;
2287 return (((ULong)ew) << 32) | ((ULong)rmode);
2295 ULong amd64g_create_mxcsr ( ULong sseround )
2307 ULong amd64g_check_fldcw ( ULong fpucw )
2311 ULong rmode = (fpucw >> 10) & 3;
2326 return (((ULong)ew) << 32) | ((ULong)rmode);
2333 ULong amd64g_create_fpucw ( ULong fpround )
2363 ULong c3210 = vex_state->guest_FC3210;
2412 ULong* vexRegs = (ULong*)(&vex_state->guest_FPREG[0]);
2466 ULong* vexRegs = (ULong*)(&vex_state->guest_FPREG[0]);
2475 ULong pair;
2505 pair = amd64g_check_fldcw ( (ULong)fpucw );
2552 do { st->guest_RAX = (ULong)(_a); \
2553 st->guest_RBX = (ULong)(_b); \
2554 st->guest_RCX = (ULong)(_c); \
2555 st->guest_RDX = (ULong)(_d); \
2636 do { st->guest_RAX = (ULong)(_a); \
2637 st->guest_RBX = (ULong)(_b); \
2638 st->guest_RCX = (ULong)(_c); \
2639 st->guest_RDX = (ULong)(_d); \
2758 do { st->guest_RAX = (ULong)(_a); \
2759 st->guest_RBX = (ULong)(_b); \
2760 st->guest_RCX = (ULong)(_c); \
2761 st->guest_RDX = (ULong)(_d); \
2920 do { st->guest_RAX = (ULong)(_a); \
2921 st->guest_RBX = (ULong)(_b); \
2922 st->guest_RCX = (ULong)(_c); \
2923 st->guest_RDX = (ULong)(_d); \
3090 do { st->guest_RAX = (ULong)(_a); \
3091 st->guest_RBX = (ULong)(_b); \
3092 st->guest_RCX = (ULong)(_c); \
3093 st->guest_RDX = (ULong)(_d); \
3214 ULong amd64g_calculate_RCR ( ULong arg,
3215 ULong rot_amt,
3216 ULong rflags_in,
3220 ULong sz = wantRflags ? (-szIN) : szIN;
3221 ULong tempCOUNT = rot_amt & (sz == 8 ? 0x3F : 0x1F);
3222 ULong cf=0, of=0, tempcf;
3282 ULong amd64g_calculate_RCL ( ULong arg,
3283 ULong rot_amt,
3284 ULong rflags_in,
3288 ULong sz = wantRflags ? (-szIN) : szIN;
3289 ULong tempCOUNT = rot_amt & (sz == 8 ? 0x3F : 0x1F);
3290 ULong cf=0, of=0, tempcf;
3351 ULong amd64g_calculate_pclmul(ULong a, ULong b, ULong which)
3353 ULong hi, lo, tmp, A[16];
3380 ULong m0 = -1;
3397 ULong amd64g_dirtyhelper_RDTSC ( void )
3402 return (((ULong)edx) << 32) | ((ULong)eax);
3420 st->guest_RAX = (ULong)eax;
3421 st->guest_RCX = (ULong)ecx;
3422 st->guest_RDX = (ULong)edx;
3431 ULong amd64g_dirtyhelper_IN ( ULong portno, ULong sz/*1,2 or 4*/ )
3434 ULong r = 0;
3462 void amd64g_dirtyhelper_OUT ( ULong portno, ULong data, ULong sz/*1,2 or 4*/ )
3493 void amd64g_dirtyhelper_SxDT ( void *address, ULong op ) {
3521 static inline ULong mk32x2 ( UInt w1, UInt w0 ) {
3522 return (((ULong)w1) << 32) | ((ULong)w0);
3525 static inline UShort sel16x4_3 ( ULong w64 ) {
3529 static inline UShort sel16x4_2 ( ULong w64 ) {
3533 static inline UShort sel16x4_1 ( ULong w64 ) {
3537 static inline UShort sel16x4_0 ( ULong w64 ) {
3542 static inline UChar sel8x8_7 ( ULong w64 ) {
3546 static inline UChar sel8x8_6 ( ULong w64 ) {
3550 static inline UChar sel8x8_5 ( ULong w64 ) {
3554 static inline UChar sel8x8_4 ( ULong w64 ) {
3558 static inline UChar sel8x8_3 ( ULong w64 ) {
3562 static inline UChar sel8x8_2 ( ULong w64 ) {
3566 static inline UChar sel8x8_1 ( ULong w64 ) {
3570 static inline UChar sel8x8_0 ( ULong w64 ) {
3576 ULong amd64g_calculate_mmx_pmaddwd ( ULong xx, ULong yy )
3588 ULong amd64g_calculate_mmx_psadbw ( ULong xx, ULong yy )
3600 return (ULong)t;
3604 ULong amd64g_calculate_sse_phminposuw ( ULong sLo, ULong sHi )
3616 return ((ULong)(idx << 16)) | ((ULong)min);
3620 ULong amd64g_calc_crc32b ( ULong crcIn, ULong b )
3623 ULong crc = (b & 0xFFULL) ^ crcIn;
3630 ULong amd64g_calc_crc32w ( ULong crcIn, ULong w )
3633 ULong crc = (w & 0xFFFFULL) ^ crcIn;
3640 ULong amd64g_calc_crc32l ( ULong crcIn, ULong l )
3643 ULong crc = (l & 0xFFFFFFFFULL) ^ crcIn;
3650 ULong amd64g_calc_crc32q ( ULong crcIn, ULong q )
3652 ULong crc = amd64g_calc_crc32l(crcIn, q);
3658 static inline ULong sad_8x4 ( ULong xx, ULong yy )
3665 return (ULong)t;
3669 ULong amd64g_calc_mpsadbw ( ULong sHi, ULong sLo,
3670 ULong dHi, ULong dLo,
3671 ULong imm_and_return_control_bit )
3679 ULong src = ((srcOffsL & 2) ? sHi : sLo) >> (32 * (srcOffsL & 1));
3684 ULong dst;
3702 ULong r0 = sad_8x4( dst >> 0, src );
3703 ULong r1 = sad_8x4( dst >> 8, src );
3704 ULong r2 = sad_8x4( dst >> 16, src );
3705 ULong r3 = sad_8x4( dst >> 24, src );
3706 ULong res = (r3 << 48) | (r2 << 32) | (r1 << 16) | r0;
3711 ULong amd64g_calculate_pext ( ULong src_masked, ULong mask )
3713 ULong dst = 0;
3714 ULong src_bit;
3715 ULong dst_bit = 1;
3726 ULong amd64g_calculate_pdep ( ULong src, ULong mask )
3728 ULong dst = 0;
3729 ULong dst_bit;
3730 ULong src_bit = 1;
3800 ULong amd64g_dirtyhelper_PCMPxSTRx (
4286 vex_state->guest_SSEROUND = (ULong)Irrm_NEAREST;