Lines Matching defs:rfbm
11589 static void gen_XSAVE_SEQUENCE ( IRTemp addr, IRTemp rfbm )
11591 /* ------ rfbm[0] gates the x87 state ------ */
11602 d0->guard = binop(Iop_CmpEQ64, binop(Iop_And64, mkexpr(rfbm), mkU64(1)),
11639 /* ------ rfbm[1] gates the SSE state ------ */
11643 assign(rfbm_1, binop(Iop_And64, mkexpr(rfbm), mkU64(2)));
11644 assign(rfbm_1or2, binop(Iop_And64, mkexpr(rfbm), mkU64(6)));
11698 /* ------ rfbm[2] gates the AVX state ------ */
11703 assign(rfbm_2, binop(Iop_And64, mkexpr(rfbm), mkU64(4)));
11743 IRTemp rfbm = newTemp(Ity_I64);
11744 assign(rfbm,
11752 gen_XSAVE_SEQUENCE(addr, rfbm);
11755 OR-ing the RFBM value into it. */
11760 unop(Iop_64to8, mkexpr(rfbm)),
11784 /* FXSAVE is just XSAVE with components 0 and 1 selected. Set rfbm
11787 IRTemp rfbm = newTemp(Ity_I64);
11788 assign(rfbm, mkU64(3));
11789 gen_XSAVE_SEQUENCE(addr, rfbm);
11795 static void gen_XRSTOR_SEQUENCE ( IRTemp addr, IRTemp xstate_bv, IRTemp rfbm )
11797 /* ------ rfbm[0] gates the x87 state ------ */
11799 /* If rfbm[0] == 1, we have to write the x87 state. If
11810 assign(rfbm_0, binop(Iop_And64, mkexpr(rfbm), mkU64(1)));
11861 /* ------ rfbm[1] gates the SSE state ------ */
11868 assign(rfbm_1, binop(Iop_And64, mkexpr(rfbm), mkU64(2)));
11877 assign(rfbm_1or2, binop(Iop_And64, mkexpr(rfbm), mkU64(6)));
11945 /* ------ rfbm[2] gates the AVX state ------ */
11954 assign(rfbm_2, binop(Iop_And64, mkexpr(rfbm), mkU64(4)));
11998 IRTemp rfbm = newTemp(Ity_I64);
11999 assign(rfbm,
12039 /* We are guaranteed now that both xstate_bv and rfbm are in the
12041 gen_XRSTOR_SEQUENCE(addr, xstate_bv, rfbm);
12067 XSAVE header. Set both rfbm and xstate_bv to 0b011 therefore,
12072 gen_XRSTOR_SEQUENCE(addr, three/*xstate_bv*/, three/*rfbm*/);
