Lines Matching full:imm5
3184 sf 1 111010010 imm5 cond 10 Rn 0 nzcv CCMP Rn, #imm5, #nzcv, cond
3185 sf 0 111010010 imm5 cond 10 Rn 0 nzcv CCMN Rn, #imm5, #nzcv, cond
3188 (CCMP) flags = if cond then flags-after-sub(Rn,imm5) else nzcv
3189 (CCMN) flags = if cond then flags-after-add(Rn,imm5) else nzcv
3195 UInt imm5 = INSN(20,16);
3209 assign(argR, mkU64(imm5));
3212 assign(argR, mkU32(imm5));
3218 imm5, nzcv, nameCC(cond));
7641 /* Let |srcV| be a V128 value, and let |imm5| be a lane-and-size
7645 *laneNo, *laneSzLg2 and *laneCh respectively. It may be that imm5
7649 imm5 = xxxx1 signifies .b[xxxx]
7658 IRExpr* srcV, UInt imm5 )
7664 if (imm5 & 1) {
7665 *laneNo = (imm5 >> 1) & 15;
7669 else if (imm5 & 2) {
7670 *laneNo = (imm5 >> 2) & 7;
7674 else if (imm5 & 4) {
7675 *laneNo = (imm5 >> 3) & 3;
7679 else if (imm5 & 8) {
7680 *laneNo = (imm5 >> 4) & 1;
8572 0 q op 01110000 imm5 0 imm4 1 n d
8583 UInt imm5 = INSN(20,16);
8590 0q0 01110000 imm5 000001 n d DUP Vd.T, Vn.Ts[index]
8597 getQReg128(nn), imm5);
8611 0q0 01110000 imm5 0 0001 1 n d DUP Vd.T, Rn
8613 imm5: xxxx1 8B(q=0) or 16b(q=1), R=W
8625 if (imm5 & 1) {
8630 else if (imm5 & 2) {
8635 else if (imm5 & 4) {
8640 else if ((imm5 & 8) && isQ) {
8663 010 01110000 imm5 000111 n d INS Vd.Ts[ix], Rn
8664 where Ts,ix = case imm5 of xxxx1 -> B, xxxx
8673 if (imm5 & 1) {
8675 laneNo = (imm5 >> 1) & 15;
8678 else if (imm5 & 2) {
8680 laneNo = (imm5 >> 2) & 7;
8683 else if (imm5 & 4) {
8685 laneNo = (imm5 >> 3) & 3;
8688 else if (imm5 & 8) {
8690 laneNo = (imm5 >> 4) & 1;
8708 0q0 01110 000 imm5 001111 n d UMOV Xd/Wd, Vn.Ts[index]
8709 0q0 01110 000 imm5 001011 n d SMOV Xd/Wd, Vn.Ts[index]
8712 Ts,index,ops = case q:imm5 of
8722 Ts,index,ops = case q:imm5 of
8738 if (!bitQ && (imm5 & 1)) { // 0:xxxx1
8739 laneNo = (imm5 >> 1) & 15;
8745 else if (bitQ && (imm5 & 1)) { // 1:xxxx1
8746 laneNo = (imm5 >> 1) & 15;
8752 else if (!bitQ && (imm5 & 2)) { // 0:xxx10
8753 laneNo = (imm5 >> 2) & 7;
8759 else if (bitQ && (imm5 & 2)) { // 1:xxx10
8760 laneNo = (imm5 >> 2) & 7;
8766 else if (!bitQ && (imm5 & 4)) { // 0:xx100
8767 laneNo = (imm5 >> 3) & 3;
8773 else if (bitQ && (imm5 & 4)) { // 1:xxx10
8774 laneNo = (imm5 >> 3) & 3;
8780 else if (bitQ && (imm5 & 8)) { // 1:x1000
8781 laneNo = (imm5 >> 4) & 1;
8802 011 01110000 imm5 0 imm4 n d INS Vd.Ts[ix1], Vn.Ts[ix2]
8804 = case imm5 of xxxx1 -> B, xxxx, imm4[3:0]
8814 if (imm5 & 1) {
8817 ix1 = (imm5 >> 1) & 15;
8820 else if (imm5 & 2) {
8823 ix1 = (imm5 >> 2) & 7;
8826 else if (imm5 & 4) {
8829 ix1 = (imm5 >> 3) & 3;
8832 else if (imm5 & 8) {
8835 ix1 = (imm5 >> 4) & 1;
9011 01 op 11110000 imm5 0 imm4 1 n d
9021 UInt imm5 = INSN(20,16);
9032 if (imm5 & 1) {
9034 laneNo = (imm5 >> 1) & 15;
9038 else if (imm5 & 2) {
9040 laneNo = (imm5 >> 2) & 7;
9044 else if (imm5 & 4) {
9046 laneNo = (imm5 >> 3) & 3;
9050 else if (imm5 & 8) {
9052 laneNo = (imm5 >> 4) & 1;
13342 000 11110 ty 1 imm8 100 imm5 d
13352 UInt imm5 = INSN(9,5);
13357 if (ty <= X01 && imm5 == BITS5(0,0,0,0,0)) {
