Lines Matching full:xer
2017 /*--- Helpers for XER flags. ---*/
2090 /* RES is the result of doing OP on ARGL and ARGR. Set %XER.OV and
2091 %XER.SO accordingly. */
2379 /* RES is the result of doing OP on ARGL and ARGR with the old %XER.CA
2380 value being OLDCA. Set %XER.CA accordingly. */
2442 If it is <= 31, behave like SRAWI; else XER.CA is the sign
2472 xer.ca == 1 iff the following is nonzero:
2561 If it is <= 31, behave like SRAWI; else XER.CA is the sign
2592 xer.ca == 1 iff the following is nonzero:
2615 If it is <= 63, behave like SRADI; else XER.CA is the sign
2647 xer.ca == 1 iff the following is nonzero:
3503 mkSzImm(ty, 0)/*old xer.ca, which is ignored*/ );
3512 mkSzImm(ty, 0)/*old xer.ca, which is ignored*/ );
3562 mkSzImm(ty, 0)/*old xer.ca, which is ignored*/ );
3590 mkSzImm(ty, 0)/*old xer.ca, which is ignored*/ );
3602 // rD = rA + rB + XER[CA]
3627 // rD = rA + (-1) + XER[CA]
3653 // rD = rA + (0) + XER[CA]
3674 XER settings are mode independent, and reflect the
3707 XER settings are mode independent, and reflect the
3839 mkSzImm(ty, 0)/*old xer.ca, which is ignored*/ );
3851 // rD = (log not)rA + rB + XER[CA]
3877 // rD = (log not)rA + (-1) + XER[CA]
3904 // rD = (log not)rA + (0) + XER[CA]
5243 /* NOTE: there are some changes to XER[41:42] that have not been
6497 // Set CR0[LT GT EQ S0] = 0b000 || XER[SO] on failure
6498 // Set CR0[LT GT EQ S0] = 0b001 || XER[SO] on success
6528 // Set CR0[LT GT EQ S0] = 0b000 || XER[SO] on failure
6529 // Set CR0[LT GT EQ S0] = 0b001 || XER[SO] on success
6562 // Set CR0[LT GT EQ S0] = 0b000 || XER[SO] on failure
6563 // Set CR0[LT GT EQ S0] = 0b001 || XER[SO] on success
6655 // Set CR0[LT GT EQ S0] = 0b000 || XER[SO] on failure
6656 // Set CR0[LT GT EQ S0] = 0b001 || XER[SO] on success
6748 // Set CR0[LT GT EQ S0] = 0b000 || XER[SO] on failure
6749 // Set CR0[LT GT EQ S0] = 0b001 || XER[SO] on success
6834 XER.CA = amt > 31 ? sign-of-rS : (computation as per srawi)
6932 XER.CA = amt > 63 ? sign-of-rS : (computation as per srawi)
7180 case 0x200: { // mcrxr (Move to Cond Register from XER, PPC32 p466)
7186 /* Move XER[0-3] (the top 4 bits of XER) to CR[crfD] */
7191 // Clear XER[0-3]
