Lines Matching defs:dN
3926 Fn is Dn when x==1, Sn when x==0
3935 case ARM64cvt_F64_I32S: /* FCVTxS Wd, Dn */
3939 case ARM64cvt_F64_I32U: /* FCVTxU Wd, Dn */
3943 case ARM64cvt_F64_I64S: /* FCVTxS Xd, Dn */
3947 case ARM64cvt_F64_I64U: /* FCVTxU Xd, Dn */
3975 ---------- 01 ----- 0,0 --------- FCVT Sd, Dn (D->S)
4005 ---------- 01 ----- 1,1 --------- FCVT Hd, Dn (D->H)
4019 000,11110 01 1,0000 0,0 10000 n d FMOV Dd, Dn (not handled)
4025 UInt dN = dregEnc(i->ARM64in.VUnaryD.src);
4036 (b15 << 5) | X10000, dN, dD);
4043 *p++ = X_3_8_5_6_5_5(X000, X11110011, X00111, X110000, dN, dD);
4050 *p++ = X_3_8_5_6_5_5(X010, X11110111, X00001, X111110, dN, dD);
4096 000 11110 011 m 0001 10 n d FDIV Dd,Dn,Dm
4101 UInt dN = dregEnc(i->ARM64in.VBinD.argL);
4113 = X_3_8_5_6_5_5(X000, X11110011, dM, (b1512 << 2) | X10, dN, dD);
4119 000 11110 001 m 0001 10 n d FDIV Dd,Dn,Dm
4140 /* 000 11110 01 1 m 00 1000 n 00 000 FCMP Dn, Dm */
4141 UInt dN = dregEnc(i->ARM64in.VCmpD.argL);
4143 *p++ = X_3_8_5_6_5_5(X000, X11110011, dM, X001000, dN, X00000);
4156 000 11110 01 1 m cond 11 n d FCSEL Dd,Dn,Dm,cond
5298 100 11110011 00110 000000 n d FMOV Xd, Dn
5312 000 11110 01 10000 00 10000 n d FMOV Dd, Dn
